-
Notifications
You must be signed in to change notification settings - Fork 0
/
.gitlab-ci.yml
544 lines (505 loc) · 17.2 KB
/
.gitlab-ci.yml
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
# Copyright 2022 Thales Silicon Security
#
# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
# You may obtain a copy of the License at https://solderpad.org/licenses/
#
# Original Author: Yannick Casamatta (yannick.casamatta@thalesgroup.com)
# Please refer to .gitlab-ci/README.md to add jobs
# Project maintainers must define following variables to adapt this CI to their runtime environment (Settings > CI/CD > Variables)
# - SETUP_CI_CVV_BRANCH: master (the main branch of CVA6 repository)
# A git repository named "setup-ci" must be created in the same namespace as cva6 and must contain the following file:
# - 'cva6/core-v-verif-cva6.yml'
#
# This file must at least contain the variables necessary for the execution of
# this pipeline.
# Other elements such as new jobs can be added to overload the associated
# downstream pipeline included in this repository.
# Example can be found in ".gitlab-ci/setup-ci-example/"
include:
- project: '$CI_PROJECT_NAMESPACE/setup-ci'
ref: '$SETUP_CI_CVV_BRANCH'
file: 'cva6/core-v-verif-cva6.yml'
workflow:
rules:
- if: $CI_PIPELINE_SOURCE == "schedule"
variables:
CI_KIND: verif
- if: $CI_COMMIT_BRANCH == "master"
variables:
CI_KIND: regress
- if: $CI_COMMIT_BRANCH =~ /.*_PR_.*/
variables:
CI_KIND: dev
- if: $CI_COMMIT_BRANCH =~ /^dev.*/
variables:
CI_KIND: dev
- variables:
CI_KIND: none
variables:
GIT_SUBMODULE_STRATEGY: recursive
DASHBOARD: cva6
DV_TARGET: cv32a6_embedded
default:
tags: [$TAGS_RUNNER]
artifacts:
when: always
paths:
- artifacts/
stages:
- setup
- light tests
- heavy tests
- backend tests
- find failures
- report
.setup_job:
stage: setup
variables:
GIT_SUBMODULE_STRATEGY: none
rules: &on_dev
- if: $CI_KIND == "regress"
- if: $CI_KIND == "verif"
- if: $CI_KIND == "dev"
- when: manual
allow_failure: true
check_env:
extends:
- .setup_job
variables:
GIT_STRATEGY: none
script:
- env
artifacts:
paths: []
build_tools:
extends:
- .setup_job
script:
- git submodule update --init verif/core-v-verif
- source $SYN_VCS_BASHRC
# ROOT_PROJECT is used by Spike installer and designates the toplevel of core-v-verif tree.
- 'export ROOT_PROJECT=$(pwd)'
# If a local build of Spike is requested, clean up build and installation directories.
- '[ -n "$SPIKE_INSTALL_DIR" -a "$SPIKE_INSTALL_DIR" = "__local__" ] && rm -rf vendor/riscv/riscv-isa-sim/build'
- '[ -n "$SPIKE_INSTALL_DIR" -a "$SPIKE_INSTALL_DIR" = "__local__" ] && rm -rf tools/spike'
# Create default directory corresponding to the artifact path.
- mkdir -p tools/spike
# Set up Spike, whether locally built or pre-installed.
# If initially set to "__local__", SPIKE_INSTALL_DIR will be resolved
# to an absolute path by the installation script.
- source verif/regress/install-spike.sh
# Strip locally built binaries and libraries to reduce artifact size.
- '[ -f $(pwd)/tools/spike/bin/spike ] && strip $(pwd)/tools/spike/bin/spike* $(pwd)/tools/spike/lib/lib*.*'
- mkdir -p artifacts/tools/
- mv tools/spike artifacts/tools/
.fe_smoke_test:
stage: light tests
rules: *on_dev
before_script:
- mkdir -p tools
- mv artifacts/tools/spike tools
- rm -rf artifacts/
- mkdir -p artifacts/{reports,logs}
- python3 .gitlab-ci/scripts/report_fail.py
- echo $SYN_VCS_BASHRC; source $SYN_VCS_BASHRC
.simu_after_script: &simu_after_script
- for i in verif/sim/*/v*_sim/*.log.iss ; do head -10000 $i > artifacts/logs/$(basename $i).head ; done
- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
smoke:
extends:
- .fe_smoke_test
variables:
DASHBOARD_JOB_TITLE: "Smoke test $DV_SIMULATORS"
DASHBOARD_JOB_DESCRIPTION: "Short tests to challenge most architectures with most testbenchs configurations"
DASHBOARD_SORT_INDEX: 0
DASHBOARD_JOB_CATEGORY: "Basic"
parallel:
matrix:
- DV_SIMULATORS:
- "veri-testharness,spike"
- "vcs-testharness,spike"
- "vcs-uvm,spike"
script:
- source verif/regress/smoke-tests.sh
- !reference [.simu_after_script]
gen_smoke:
extends:
- .fe_smoke_test
variables:
DASHBOARD_JOB_TITLE: "Smoke Generated test $DV_SIMULATORS"
DASHBOARD_JOB_DESCRIPTION: "Short generated tests to challenge the CVA6-DV on STEP1 configuration"
DASHBOARD_SORT_INDEX: 0
DASHBOARD_JOB_CATEGORY: "Basic"
DV_SIMULATORS: "vcs-uvm,spike"
script:
- source verif/regress/smoke-gen_tests.sh
- !reference [.simu_after_script]
coremark:
extends:
- .fe_smoke_test
variables:
DASHBOARD_JOB_TITLE: "CoreMark"
DASHBOARD_JOB_DESCRIPTION: "Performance indicator"
DASHBOARD_SORT_INDEX: 5
DASHBOARD_JOB_CATEGORY: "Performance"
script:
- bash verif/regress/coremark.sh --no-print
- python3 .gitlab-ci/scripts/report_benchmark.py --coremark verif/sim/out_*/veri-testharness_sim/core_main.log
hwconfig:
extends:
- .fe_smoke_test
variables:
DASHBOARD_JOB_TITLE: "HW config $DV_SIMULATORS $DV_HWCONFIG_OPTS"
DASHBOARD_JOB_DESCRIPTION: "Short tests to challenge target configurations"
DASHBOARD_SORT_INDEX: 1
DASHBOARD_JOB_CATEGORY: "Basic"
DV_SIMULATORS: "veri-testharness,spike"
DV_HWCONFIG_OPTS: "--default_config=cv32a60x --isa=rv32imac"
script:
- source verif/regress/hwconfig_tests.sh
- python3 .gitlab-ci/scripts/report_pass.py
.synthesis_test:
stage: heavy tests
timeout: 2 hours
before_script:
- !reference [.fe_smoke_test, before_script]
rules: &on_dev_rtl
- if: $CI_KIND == "regress"
- if: $CI_KIND == "verif"
- if: $CI_KIND == "dev"
changes:
paths:
- core/**/*
- corev_apu/**/*
compare_to: master
- when: manual
allow_failure: true
asic-synthesis:
extends:
- .synthesis_test
variables:
DASHBOARD_JOB_TITLE: "ASIC Synthesis $DV_TARGET"
DASHBOARD_JOB_DESCRIPTION: "Synthesis indicator with specific Techno"
DASHBOARD_SORT_INDEX: 5
DASHBOARD_JOB_CATEGORY: "Synthesis"
INPUT_DELAY: "0.46"
OUTPUT_DELAY: "0.11"
PERIOD: "0.85"
script:
- echo $SYNTH_PERIOD
- echo $INPUT_DELAY
- echo $OUTPUT_DELAY
- echo $NAND2_AREA
- echo $FOUNDRY_PATH
- echo $PERIOD
- echo $TECH_NAME
- echo $DV_TARGET
- source verif/regress/install-cva6.sh
- echo $SYN_DCSHELL_BASHRC; source $SYN_DCSHELL_BASHRC
- make -C pd/synth cva6_synth TARGET="$DV_TARGET"
- mv pd/synth/cva6_${DV_TARGET}_synth_modified.v artifacts/cva6_${DV_TARGET}_synth_modified.v
- python3 .gitlab-ci/scripts/report_synth.py pd/synth/cva6_${DV_TARGET}/reports/$PERIOD/cva6_$(echo $TECH_NAME)_synth_area.rpt pd/synth/synthesis_batch.log
fpga-build:
extends:
- .synthesis_test
variables:
DASHBOARD_JOB_TITLE: "FPGA Build $TARGET"
DASHBOARD_JOB_DESCRIPTION: "Test of FPGA build flow"
DASHBOARD_SORT_INDEX: 9
DASHBOARD_JOB_CATEGORY: "Synthesis"
TARGET: cv32a60x
script:
- source $VIVADO_SETUP
- source verif/regress/install-cva6.sh
- make fpga target=$TARGET
- mkdir -p artifacts/reports
- mv corev_apu/fpga/work-fpga/ariane_xilinx.bit artifacts/ariane_xilinx_$TARGET.bit
- python3 .gitlab-ci/scripts/report_fpga.py corev_apu/fpga/reports/ariane.utilization.rpt
.regress_test:
stage: heavy tests
before_script:
- !reference [.fe_smoke_test, before_script]
rules: &on_regress
- if: $CI_KIND == "regress"
- if: $CI_KIND == "verif"
- when: manual
allow_failure: true
dhrystone:
extends:
- .regress_test
variables:
DASHBOARD_JOB_TITLE: "Dhrystone"
DASHBOARD_JOB_DESCRIPTION: "Performance indicator"
DASHBOARD_SORT_INDEX: 5
DASHBOARD_JOB_CATEGORY: "Performance"
script:
- bash verif/regress/dhrystone.sh
- python3 .gitlab-ci/scripts/report_benchmark.py --dhrystone verif/sim/out_*/veri-testharness_sim/dhrystone_main.log
riscv_arch_test:
extends:
- .regress_test
variables:
DASHBOARD_JOB_TITLE: "arch_test $DV_TARGET"
DASHBOARD_JOB_DESCRIPTION: "Compliance regression suite"
DASHBOARD_SORT_INDEX: 0
DASHBOARD_JOB_CATEGORY: "Test suites"
DV_SIMULATORS: "veri-testharness,spike"
script: source verif/regress/dv-riscv-arch-test.sh
after_script: *simu_after_script
compliance:
extends:
- .regress_test
variables:
DASHBOARD_JOB_TITLE: "Compliance $DV_TARGET"
DASHBOARD_JOB_DESCRIPTION: "Compliance regression suite"
DASHBOARD_SORT_INDEX: 2
DASHBOARD_JOB_CATEGORY: "Test suites"
DV_SIMULATORS: "veri-testharness,spike"
script: source verif/regress/dv-riscv-compliance.sh
after_script: *simu_after_script
riscv-tests-v:
extends:
- .regress_test
variables:
DASHBOARD_JOB_TITLE: "Riscv-test $DV_TARGET (virtual)"
DASHBOARD_JOB_DESCRIPTION: "Riscv-test regression suite (virtual)"
DASHBOARD_SORT_INDEX: 3
DASHBOARD_JOB_CATEGORY: "Test suites"
DV_SIMULATORS: "veri-testharness,spike"
DV_TARGET: cv64a6_imafdc_sv39
DV_TESTLISTS: "../tests/testlist_riscv-tests-$DV_TARGET-v.yaml"
script: source verif/regress/dv-riscv-tests.sh
after_script: *simu_after_script
riscv-tests-p:
extends:
- .regress_test
variables:
DASHBOARD_JOB_TITLE: "Riscv-test $DV_TARGET (physical)"
DASHBOARD_JOB_DESCRIPTION: "Riscv-test regression suite (physical)"
DASHBOARD_SORT_INDEX: 4
DASHBOARD_JOB_CATEGORY: "Test suites"
DV_SIMULATORS: "veri-testharness,spike"
DV_TESTLISTS: "../tests/testlist_riscv-tests-$DV_TARGET-p.yaml"
script: source verif/regress/dv-riscv-tests.sh
after_script: *simu_after_script
.verif_test:
extends:
- .regress_test
rules: &on_verif
- if: $CI_KIND == "verif"
- when: manual
allow_failure: true
timeout: 4h
csr_test:
extends:
- .verif_test
variables:
DASHBOARD_JOB_TITLE: "csr_test $DV_TARGET"
DASHBOARD_JOB_DESCRIPTION: "CSR regression suite"
DASHBOARD_SORT_INDEX: 0
DASHBOARD_JOB_CATEGORY: "Test suites"
DV_SIMULATORS: "veri-testharness,spike"
script: source verif/regress/dv-riscv-csr-access-test.sh
after_script: *simu_after_script
mmu_sv32_tests:
extends:
- .verif_test
variables:
DASHBOARD_JOB_TITLE: "mmu_sv32_tests $DV_TARGET"
DASHBOARD_JOB_DESCRIPTION: "MMU SV32 regression suite"
DASHBOARD_SORT_INDEX: 0
DASHBOARD_JOB_CATEGORY: "Test suites"
DV_SIMULATORS: "veri-testharness,spike"
DV_TARGET: cv32a60x
script: source verif/regress/dv-riscv-mmu-sv32-test.sh
after_script: *simu_after_script
generated_tests:
extends:
- .verif_test
variables:
DASHBOARD_SORT_INDEX: 11
DASHBOARD_JOB_CATEGORY: "Code Coverage"
parallel:
matrix:
- list_num: 1
DASHBOARD_JOB_TITLE: "Generated Random Arithmetic tests"
DASHBOARD_JOB_DESCRIPTION: "Generate Random Arithmetic tests using CVA6-DV"
- list_num: 2
DASHBOARD_JOB_TITLE: "Generated Hazard Arithmetic tests"
DASHBOARD_JOB_DESCRIPTION: "Generate Hazard register (RAW) Arithmetic tests using CVA6-DV"
- list_num: 3
DASHBOARD_JOB_TITLE: "Generated CSR tests"
DASHBOARD_JOB_DESCRIPTION: "Generate Random CSR tests using CVA6-DV"
- list_num: 4
DASHBOARD_JOB_TITLE: "Generated MMU tests"
DASHBOARD_JOB_DESCRIPTION: "Generate Random MMU tests using CVA6-DV"
- list_num: 5
DASHBOARD_JOB_TITLE: "Generated Random Load_store tests"
DASHBOARD_JOB_DESCRIPTION: "Generate Random Load_store tests using CVA6-DV"
- list_num: 6
DASHBOARD_JOB_TITLE: "Generated Jump tests"
DASHBOARD_JOB_DESCRIPTION: "Generate Random Arithmetic Jump tests using CVA6-DV"
script:
- mkdir -p artifacts/coverage
- source verif/regress/dv-generated-tests.sh
- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
- mv verif/sim/seedlist.yaml artifacts/coverage
- python3 .gitlab-ci/scripts/report_pass.py
generated_xif_tests:
extends:
- .verif_test
variables:
DASHBOARD_SORT_INDEX: 12
DASHBOARD_JOB_CATEGORY: "Code Coverage"
parallel:
matrix:
- list_num: 1
DASHBOARD_JOB_TITLE: "Generated Random xif tests"
DASHBOARD_JOB_DESCRIPTION: "Generate Random tests for cvxif using CVA6-DV"
script:
- mkdir -p artifacts/coverage
- source verif/regress/dv-generated-xif-tests.sh
- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
- mv verif/sim/seedlist.yaml artifacts/coverage
- python3 .gitlab-ci/scripts/report_pass.py
directed_isacov-tests:
extends:
- .verif_test
variables:
DASHBOARD_SORT_INDEX: 13
DASHBOARD_JOB_CATEGORY: "Functional Coverage"
parallel:
matrix:
- list_num: 0
DASHBOARD_JOB_TITLE: "Directed tests"
DASHBOARD_JOB_DESCRIPTION: "Execute directed tests to improve functional coverage of ISA"
script:
- mkdir -p artifacts/coverage
- source verif/regress/dv-generated-tests.sh
- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
- python3 .gitlab-ci/scripts/report_pass.py
directed_xif-tests:
extends:
- .verif_test
variables:
DASHBOARD_SORT_INDEX: 15
DASHBOARD_JOB_CATEGORY: "Functional Coverage"
parallel:
matrix:
- list_num: 0
DASHBOARD_JOB_TITLE: "Directed tests"
DASHBOARD_JOB_DESCRIPTION: "Execute directed tests to improve functional coverage of cvxif"
script:
- mkdir -p artifacts/coverage
- source verif/regress/dv-generated-xif-tests.sh
- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
- python3 .gitlab-ci/scripts/report_pass.py
.backend_test:
stage: backend tests
before_script:
- mkdir -p artifacts/{reports,logs}
- python3 .gitlab-ci/scripts/report_fail.py
smoke-gate:
extends:
- .backend_test
needs:
- build_tools
- asic-synthesis
variables:
DASHBOARD_JOB_TITLE: "Smoke Gate $DV_TARGET"
DASHBOARD_JOB_DESCRIPTION: "Simple test to check netlist from ASIC synthesis"
DASHBOARD_SORT_INDEX: 6
DASHBOARD_JOB_CATEGORY: "Post Synthesis"
script:
- mkdir -p tools
- mv artifacts/tools/spike tools
- echo $SYN_VCS_BASHRC; source $SYN_VCS_BASHRC
- echo $LIB_VERILOG
- echo $FOUNDRY_PATH
- echo $PERIOD
- echo $TECH_NAME
- source verif/regress/install-cva6.sh
- source verif/regress/install-riscv-dv.sh
- source verif/regress/install-riscv-tests.sh
- mv artifacts/cva6_${DV_TARGET}_synth_modified.v pd/synth/cva6_${DV_TARGET}_synth_modified.v
- cd verif/sim
- make vcs_clean_all
- python3 cva6.py --testlist=../tests/testlist_riscv-tests-cv32a60x-p.yaml --test rv32ui-p-lw --iss_yaml cva6.yaml --target $DV_TARGET --iss=spike,vcs-gate $DV_OPTS
after_script: *simu_after_script
fpga-boot:
extends:
- .backend_test
tags: [fpga,shell]
needs:
- build_tools
- fpga-build
variables:
DASHBOARD_JOB_TITLE: "FPGA Linux32 Boot "
DASHBOARD_JOB_DESCRIPTION: "Test of Linux 32 bits boot on FPGA Genesys2"
DASHBOARD_SORT_INDEX: 10
DASHBOARD_JOB_CATEGORY: "Synthesis"
VERILATOR_INSTALL_DIR: "NO" # Skip install and checks of verilator
SPIKE_INSTALL_DIR: "NO" # Skip install and checks of spike
script:
- source verif/regress/install-cva6.sh
- source $VIVADO2022_SETUP
- mkdir -p corev_apu/fpga/work-fpga
- mv artifacts/ariane_xilinx_cv32a60x.bit corev_apu/fpga/work-fpga/ariane_xilinx.bit
- cd corev_apu/fpga/scripts
- source check_fpga_boot.sh
- cd -
- python3 .gitlab-ci/scripts/report_fpga_boot.py corev_apu/fpga/scripts/fpga_boot.rpt
code_coverage-report:
extends:
- .backend_test
needs:
- generated_tests
- directed_isacov-tests
- generated_xif_tests
- directed_xif-tests
variables:
DASHBOARD_JOB_TITLE: "Report merge coverage"
DASHBOARD_JOB_DESCRIPTION: "Report merge coverage of generated tests"
DASHBOARD_SORT_INDEX: 14
DASHBOARD_JOB_CATEGORY: "Code Coverage"
script:
- echo $SYN_VCS_BASHRC; source $SYN_VCS_BASHRC
- mkdir -p artifacts/cov_reports/
- mkdir -p verif/sim/vcs_results/default/vcs.d
- mv artifacts/coverage/simv.vdb verif/sim/vcs_results/default/vcs.d/
- mv artifacts/coverage/seedlist.yaml verif/sim/seedlist.yaml
- make -C verif/sim generate_cov_dash
- mv verif/sim/urgReport artifacts/cov_reports/
- python3 .gitlab-ci/scripts/report_coverage.py artifacts/cov_reports/urgReport/hierarchy.txt
check gitlab jobs status:
stage: find failures
rules:
- if: $DASHBOARD_URL && $CI_KIND != "none"
when: on_failure
variables:
DASHBOARD_JOB_TITLE: "Environment check"
DASHBOARD_JOB_DESCRIPTION: "Detect environment issues"
DASHBOARD_SORT_INDEX: 0
DASHBOARD_JOB_CATEGORY: "Environment"
GIT_SUBMODULE_STRATEGY: none
script:
- rm -rf artifacts/
- mkdir -p artifacts/reports
- python3 .gitlab-ci/scripts/report_envfail.py
merge reports:
stage: report
variables:
GIT_SUBMODULE_STRATEGY: none
rules:
- if: $DASHBOARD_URL && $CI_KIND != "none"
when: always
script:
- mkdir -p artifacts/reports
- ls -al artifacts/reports
- python3 .gitlab-ci/scripts/merge_job_reports.py artifacts/reports pipeline_report_$CI_PIPELINE_ID.yml
artifacts:
when: always
paths:
- "artifacts/reports/pipeline_report_$CI_PIPELINE_ID.yml"