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stm8ef.asm
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stm8ef.asm
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Copyright Jacques Deschênes 2019,2020,2021
;; This file is part of stm32_eforth
;;
;; stm8_eforth is free software: you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation, either version 3 of the License, or
;; (at your option) any later version.
;;
;; stm32_eforth is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY;; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with stm32_eforth. If not, see <http:;;www.gnu.org/licenses/>.
;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;-------------------------------------------------------------
; eForth for STM8S adapted from C. H. Ting source file to
; assemble using sdasstm8
; implemented on NUCLEO-8S208RB board
; Adapted by picatout 2019/10/27
; https://github.com/picatout/stm8_nucleo/eForth
;--------------------------------------------------------------
.module EFORTH
.optsdcc -mstm8
.nlist
.include "inc/macros.inc"
.include "inc/config.inc"
.list
.page
;===============================================================
; Adaption to NUCLEO-8S208RB by Picatout
; Date: 2020-06-07
; Suite aux nombreux changement remplacé le numéro de version pour 3.0
; Date: 2019-10-26
; Changes to memory map:
; 0x16f0 Data Stack, growing downward
; 0x1700 Terminal input buffer TIB
; 0x17ff Return Stack, growing downard
;================================================================
; STM8EF, Version 2.1, 13 July
; Implemented on STM8S-Discovery Board.
; Assembled by ST VisualDevelop STVD
; Bootup on internal 2 MHz clock
; Switch to external 16 MHz crystal clock
;
; FORTH Virtual Machine:
; Subroutine threaded model
; SP Return stack pointer
; X Data stack pointer
; A,Y Scratch pad registers
;
; Memory Map:
; 0x0 RAM memory, system variables
; 0x80 Start of user defined words, linked to ROM dictionary
; 0x780 Data stack, growing downward
; 0x790 Terminal input buffer TIB
; 0x7FF Return stack, growing downward
; 0x8000 Interrupt vector table
; 0x8080 FORTH startup code
; 0x80E7 Start of FORTH dictionary in ROM
; 0x9584 End of FORTH dictionary
;
; 2020-04-26 Addapted for NUCLEO-8S208RB by Picatout
; use UART1 instead of UART2 for communication with user.
; UART1 is available as ttyACM* device via USB connection.
; Use TIMER4 for millisecond interrupt to support MS counter
; and MSEC word that return MS value.
;
; EF12, Version 2.1, 18apr00cht
; move to 8000H replacing WHYP.
; copy interrupt vectors from WHYPFLSH.S19
; to EF12.S19 before flashing
; add TICKS1 and DELAY1 for motor stepping
;
; EF12, 02/18/00, C. H. Ting
; Adapt 86eForth v2.02 to 68HC12.
; Use WHYP to seed EF12.ASM
; Use AS12 native 68HC12 assembler:
; as12 ef12.asm >ef12.lst
; EF12A, add ADC code, 02mar00cht
; EF12B, 01mar00cht
; stack to 0x78, return stack to 0xf8.
; add all port definitions
; add PWM registers
; add SPI registers and code
; EF12C, 12mar00cht
; add MAX5250 D/A converter
; EF12D, 15mar00cht
; add all the Lexel interface words
; EF12E, 18apr00cht, save for reference
;
; Copyright (c) 2000
; Dr. C. H. Ting
; 156 14th Avenue
; San Mateo, CA 94402
; (650) 571-7639
;
;*********************************************************
; Assembler constants
;*********************************************************
RAMBASE = 0x0000 ;ram base
.if NUCLEO_8S20X
STACK = 0x17FF ;system (return) stack empty
DATSTK = 0x1680 ;data stack empty
TBUFFBASE = 0x1680 ; flash read/write transaction buffer address
TIBBASE = 0X1700 ; transaction input buffer addr.
.else ; DISCOVERY
STACK = 0x7FF ;system (return) stack empty
DATSTK = 0x680 ;data stack empty
TBUFFBASE = 0x680 ; flash read/write transaction buffer address
TIBBASE = 0X700 ; transaction input buffer addr.
.endif
; floatting point state bits in UFPSW
ZBIT=0 ; zero bit flag
NBIT=1 ; negative flag
OVBIT=2 ; overflow flag
;; Memory allocation
UPP = RAMBASE+6 ; systeme variables base address
SPP = RAMBASE+DATSTK ; data stack bottom
RPP = RAMBASE+STACK ; return stack bottom
ROWBUFF = RAMBASE+TBUFFBASE ; flash write buffer
TIBB = RAMBASE+TIBBASE ; transaction input buffer
VAR_BASE = RAMBASE+0x80 ; user variables start here .
VAR_TOP = STACK-32*CELLL ; reserve 32 cells for data stack.
; user variables constants
UBASE = UPP ; numeric base
UFPSW = UBASE+2 ; floating point state word
UTMP = UFPSW+2 ; temporary storage
UINN = UTMP+2 ; >IN tib pointer
UCTIB = UINN+2 ; tib count
UTIB = UCTIB+2 ; tib address
UINTER = UTIB+2 ; interpreter vector
UHLD = UINTER+2 ; hold
UCNTXT = UHLD+2 ; context, dictionary first link
UVP = UCNTXT+2 ; variable pointer
UCP = UVP+2 ; code pointer
ULAST = UCP+2 ; last dictionary pointer
UOFFSET = ULAST+2 ; distance between CP and VP to adjust jump address at compile time.
UTFLASH = UOFFSET+2 ; select where between FLASH and RAM for compilation destination.
URLAST = UTFLASH+2 ; context for dictionary in RAM memory
;****** System Variables ******
XTEMP = URLAST +2;address called by CREATE
YTEMP = XTEMP+2 ;address called by CREATE
PROD1 = XTEMP ;space for UM*
PROD2 = PROD1+2
PROD3 = PROD2+2
CARRY = PROD3+2
SP0 = CARRY+2 ;initial data stack pointer
RP0 = SP0+2 ;initial return stack pointer
MS = RP0+2 ; millisecond counter
CNTDWN = MS+2 ; count down timer
FPTR = CNTDWN+2 ; 24 bits farptr
PTR16 = FPTR+1 ; middle byte of farptr
PTR8 = FPTR+2 ; least byte of farptr
SEEDX = PTR8+2 ; PRNG seed X
SEEDY = SEEDX+2 ; PRNG seed Y
RX_CHAR = SEEDY+2 ; last char received from UART
CHAR_RDY = RX_CHAR+1 ; boolean flag TRUE if char received
; EEPROM persistant data
APP_LAST = EEPROM_BASE ; Application last word pointer
APP_RUN = APP_LAST+2 ; application autorun address
APP_CP = APP_RUN+2 ; free application space pointer
APP_VP = APP_CP+2 ; free data space pointer
;***********************************************
;; Version control
VER = 4 ;major release version
EXT = 1 ;minor extension
;; Constants
TRUEE = 0xFFFF ;true flag
COMPO = 0x40 ;lexicon compile only bit
IMEDD = 0x80 ;lexicon immediate bit
MASKK = 0x1F7F ;lexicon bit mask
CELLL = 2 ;size of a cell
DBL_SIZE = 2*CELLL ; size of double integer
BASEE = 10 ;default radix
BKSPP = 8 ;back space
LF = 10 ;line feed
CRR = 13 ;carriage return
XON = 17
XOFF = 19
CTRL_X = 24 ; reboot hotkey
ERR = 27 ;error escape
TIC = 39 ;tick
CALLL = 0xCD ;CALL opcodes
IRET_CODE = 0x80 ; IRET opcode
ADDWX = 0x1C ; opcode for ADDW X,#word
JPIMM = 0xCC ; JP addr opcode
.macro _ledon
bset LED_PORT,#LED_BIT
.endm
.macro _ledoff
bres LED_PORT,#LED_BIT
.endm
;**********************************************************
.area DATA (ABS)
.org RAMBASE
;**********************************************************
;**********************************************************
.area SSEG (ABS) ; STACK
.org 0x1700
.ds 256
; space for DATSTK,TIB and STACK
;**********************************************************
;**********************************************************
.area HOME ; vectors table
;**********************************************************
int main ; reset
int NonHandledInterrupt ; trap
int NonHandledInterrupt ; irq0
int NonHandledInterrupt ; irq1
int NonHandledInterrupt ; irq2
int NonHandledInterrupt ; irq3
int NonHandledInterrupt ; irq4
int NonHandledInterrupt ; irq5
int NonHandledInterrupt ; irq6
int NonHandledInterrupt ; irq7
int NonHandledInterrupt ; irq8
int NonHandledInterrupt ; irq9
int NonHandledInterrupt ; irq10
int NonHandledInterrupt ; irq11
int NonHandledInterrupt ; irq12
int NonHandledInterrupt ; irq13
int NonHandledInterrupt ; irq14
int NonHandledInterrupt ; irq15
int NonHandledInterrupt ; irq16
int NonHandledInterrupt ; irq17
int UartRxHandler ; irq18
int NonHandledInterrupt ; irq19
int NonHandledInterrupt ; irq20
int UartRxHandler ; irq21
int NonHandledInterrupt ; irq22
int Timer4Handler ; irq23
int NonHandledInterrupt ; irq24
int NonHandledInterrupt ; irq25
int NonHandledInterrupt ; irq26
int NonHandledInterrupt ; irq27
int NonHandledInterrupt ; irq28
int NonHandledInterrupt ; irq29
;**********************************************************
.area CODE
;**********************************************************
; non handled interrupt reset MCU
NonHandledInterrupt:
iret
; ld a, #0x80
; ld WWDG_CR,a ; WWDG_CR used to reset mcu
; used for milliseconds counter
; MS is 16 bits counter
Timer4Handler:
clr TIM4_SR
ldw x,MS
incw x
ldw MS,x
ldw x,CNTDWN
jreq 1$
decw x
ldw CNTDWN,x
1$:
iret
UartRxHandler:
btjf UART_SR,#UART_SR_RXNE,1$
LD A,UART_DR
JREQ 1$
CP A,#CTRL_X
JREQ reset_mcu
; accept this character
LD RX_CHAR,A
MOV CHAR_RDY,#255
1$: IRET
reset_mcu:
LD A, #0x80
LD WWDG_CR,A ; WWDG_CR used to reset mcu
JRA .
;; Main entry points and COLD start data
main:
; clear all RAM
ldw X,#RAMBASE
clear_ram0:
clr (X)
incw X
cpw X,#RAM_END
jrule clear_ram0
ldw x,#RPP
ldw sp,x
; set SEEDX and SEEDY to 1
inc SEEDX+1
inc SEEDY+1
jp ORIG
; COLD initialize these variables.
UZERO:
.word BASEE ;BASE
.word 0 ; floating point state
.word 0 ;tmp
.word 0 ;>IN
.word 0 ;#TIB
.word TIBB ;TIB
.word INTER ;'EVAL
.word 0 ;HLD
.word LASTN ;CNTXT pointer
.word VAR_BASE ;variables free space pointer
.word app_space ; FLASH free space pointer
.word LASTN ;LAST
.word 0 ; OFFSET
.word 0 ; TFLASH
; .word 0 ; URLAST
UEND: .word 0
ORIG:
; initialize SP
LDW X,#STACK ;initialize return stack
LDW SP,X
LDW RP0,X
LDW X,#DATSTK ;initialize data stack
LDW SP0,X
.if NUCLEO_8S20X|DISCOVERY
; initialize USER LED on board
; added by Picatout
bset LED_CR1,#LED_BIT
bset LED_CR2,#LED_BIT
bset LED_DDR,#LED_BIT
.endif
_ledoff
; initialize clock to HSI
; no divisor 16Mhz
; Added by Picatout
clock_init:
clr CLK_CKDIVR
bset CLK_SWCR,#CLK_SWCR_SWEN
.if NUCLEO_8S20X|DOORBELL
mov CLK_SWR,#CLK_SWR_HSI ; 16 Mhz internal
.else ; DISCOVERY as 16Mhz crystal
mov CLK_SWR,#CLK_SWR_HSE
.endif
ld a,CLK_SWR
1$: cp a,CLK_CMSR
jrne 1$
; initialize UART, 115200 8N1
.if NUCLEO_8S20X|DISCOVERY
uart_init:
; bset CLK_PCKENR1,#UART_PCKEN
; configure tx pin
bset UART_PORT_DDR,#UART_TX_PIN ; tx pin
bset UART_PORT_CR1,#UART_TX_PIN ; push-pull output
bset UART_PORT_CR2,#UART_TX_PIN ; fast output
; baud rate 115200 Fmaster=16Mhz 16000000/115200=139=0x8b
; baud rate 115200 Fmaster=8Mhz 8000000/115200=69=0x45
; 1) check clock source, HSI at 16Mhz or HSE at 8Mhz
ld a,#CLK_SWR_HSI
cp a,CLK_CMSR
jreq 2$
1$: ; 8 Mhz
mov UART_BRR2,#0x05 ; must be loaded first
mov UART_BRR1,#0x4
jra 3$
2$: ; 16 Mhz
mov UART_BRR2,#0x0b ; must be loaded first
mov UART_BRR1,#0x08
3$:
clr UART_DR
mov UART_CR2,#((1<<UART_CR2_TEN)|(1<<UART_CR2_REN)|(1<<UART_CR2_RIEN));
bset UART_CR2,#UART_CR2_SBK
btjf UART_SR,#UART_SR_TC,.
.endif
; initialize timer4, used for millisecond interrupt
mov TIM4_PSCR,#7 ; prescale 128
mov TIM4_ARR,#125 ; set for 1msec.
mov TIM4_CR1,#((1<<TIM4_CR1_CEN)|(1<<TIM4_CR1_URS))
bset TIM4_IER,#TIM4_IER_UIE
; set TIM4 interrupt priority to highest
ld a,#~(IPR_MASK<<6)
and a,ITC_SPR6
or a,#(IPR3<<6)
ld ITC_SPR6,a
rim
jp COLD ;default=MN1
LINK = 0 ; used by _HEADER macro
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; place MCU in sleep mode with
;; halt opcode
;; BYE ( -- )
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER BYE,3,"BYE"
halt
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;
; Enable interrupts
; EI ( -- )
;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER EI,2,"EI"
rim
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;
; Disable interrupts
; DI ( -- )
;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER DI,2,"DI"
sim
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; set interrupt priority level
; SET-ISP ( n1 n2 -- )
; n1 level {1..3}
; n2 vector {0..29}
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER SETISP,7,"SET-ISP"
ldw y,x
ldw y,(y)
ld a,#4 ; 4 slot per register
; quotient select register, remainder select slot in register.
div y,a ; register=ITC_SPR1[Y], lshift=2*A
and a,#3
sll a ; 2*SLOT lshift
addw y,#ITC_SPR1
ldw (x),y ; ( level reg -- )
clrw y
ld yl,a
subw x,#CELLL
ldw (x),y ; ( level reg lshift -- )
ldw y,x
ldw y,(2,y)
ld a,(y) ; reg_value
subw x,#CELLL
ldw (x),y ; ( level reg lshift rval -- )
call OVER ; ( level reg lshift rval lshift -- )
call DOLIT
.word 3
call SWAPP ; ( level reg lshift rval 3 lshift )
call LSHIFT ; creat slot mask
call INVER ; ( level reg lshift rval mask )
call ANDD ; ( level reg lshift slot_masked )
call TOR ; ( level reg lshift -- R: slot_masked )
call ROT ; ( reg lshift level )
call SWAPP ; ( reg level lshift )
call LSHIFT ; ( reg slot_level -- )
call RFROM ; ( reg slot_level masked_val )
call ORR ; ( reg updated_rval )
call SWAPP
jp CSTOR
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; sélectionne l'application
; qui démarre automatique lors
; d'un COLD start
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER AUTORUN,7,"AUTORUN"
call TOKEN
call DUPP
call QBRAN
.word FORGET2
call NAMEQ
call QDUP
call QBRAN
.word FORGET2
_DROP
subw x,#2*CELLL
clrw y
ldw (x),y
ldw y,#APP_RUN
ldw (2,x),y
jp EESTORE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Reset dictionary pointer before
;; forgotten word. RAM space and
;; interrupt vector defined after
;; must be resetted also.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER FORGET,6,"FORGET"
call TOKEN
call DUPP
call QBRAN
.word FORGET2
call NAMEQ ; ( a -- ca na | a F )
call QDUP
call QBRAN
.word FORGET2
; only forget users words
call DUPP ; ( ca na na )
call DOLIT
.word app_space
call SWAPP
call ULESS
call QBRAN
.word FORGET6
; ( ca na -- )
;reset ivec with address >= ca
call SWAPP ; ( na ca -- )
call CHKIVEC ; ( na -- )
; start at LAST and link back to na
; if variable found reset VP at that point.
FORGET1:
call LAST
call AT
call DUPP ; ( -- na last last )
call FREEVAR ; ( -- na last )
call DUPP
call DOLIT
.word 2
call SUBB ; ( na last -- na last lfa ) link address
call AT
call DUPP ; ( -- na last a a )
call CNTXT
call STORE
call LAST
call STORE ; ( -- na last )
call OVER
call EQUAL ; ( na last na -- na T|F )
call QBRAN
.word FORGET1
; ( na -- )
call DOLIT
.word 2
call SUBB
call CPP
call STORE
call UPDATCP
jp UPDATLAST
FORGET6: ; tried to forget a RAM or system word
; ( ca na -- )
subw x,#CELLL
ldw y,SP0
ldw (x),y
call ULESS
call QBRAN
.word PROTECTED
call ABORQ
.byte 29
.ascii " For RAM definition do REBOOT"
PROTECTED:
call ABORQ
.byte 10
.ascii " Protected"
FORGET2: ; no name or not found in dictionary
call ABORQ
.byte 5
.ascii " what"
FORGET4:
jp DROP
;;;;;;;;;;;;;;;;;;;;;
; if na is variable
; free variable data
; FREEVAR ( na -- )
;;;;;;;;;;;;;;;;;;;;;;
_HEADER FREEVAR,7,"FREEVAR"
call DUPP ; ( na na -- )
CALL CAT ; ( na c -- )
call ONEP ;
CALL PLUS ; ( na c+1 -- ca )
call ONEP ; ( ca+ -- ) to get routne address
call DUPP ; ( ca+ ca+ -- )
CALL AT ; ( ca+ fnaddr -- ) ; fnaddr is routine address
call DOLIT
.word DOVAR ; if routine address is DOVAR then variable
call EQUAL ; ( ca+ fnaddr DOVAR -- ca+ T|F )
call QBRAN
.word FREEVAR4
call DOLIT
.word 2
call PLUS ; ( ca+ 2 -- da ) da is data address
call AT
call VPP
call STORE
jp UPDATVP
FREEVAR4: ; not variable
_DROP
RET
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; SEED ( n -- )
; Initialize PRNG seed with n
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER SEED,4,"SEED"
ldw y,x
addw x,#CELLL
ldw y,(y)
ld a,yh
ld SEEDX,a
ld a,yl
ld SEEDY,a
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; RANDOM ( u1 -- u2 )
; Pseudo random number betwen 0 and u1-1
; XOR32 algorithm
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER RANDOM,6,"RANDOM"
;local variable
SPSAVE=1
VSIZE=2
sub sp,#VSIZE
ldw (SPSAVE,sp),x
; XTEMP=(SEEDX<<5)^SEEDX
ldw y,x
ldw y,(y)
ldw YTEMP,y
ldw x,SEEDX
sllw x
sllw x
sllw x
sllw x
sllw x
ld a,xh
xor a,SEEDX
ld XTEMP,a
ld a,xl
xor a,SEEDX+1
ld XTEMP+1,a
; SEEDX=SEEDY
ldw x,SEEDY
ldw SEEDX,x
; SEEDY=SEEDY^(SEEDY>>1)
srlw x
ld a,xh
xor a,SEEDY
ld SEEDY,a
ld a,xl
xor a,SEEDY+1
ld SEEDY+1,a
; XTEMP>>3
ldw x,XTEMP
srlw x
srlw x
srlw x
; x=XTEMP^x
ld a,xh
xor a,XTEMP
ld xh,a
ld a,xl
xor a,XTEMP+1
ld xl,a
; SEEDY=x^SEEDY
xor a,SEEDY+1
ld xl,a
ld a,xh
xor a,SEEDY
ld xh,a
ldw SEEDY,x
; return SEEDY modulo YTEMP
ldw y,YTEMP
divw x,y
ldw x,(SPSAVE,sp)
ldw (x),y
addw sp,#VSIZE
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; get millisecond counter
;; msec ( -- u )
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER MSEC,4,"MSEC"
subw x,#CELLL
ldw y,MS
ldw (x),y
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; suspend execution for u msec
; pause ( u -- )
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER PAUSE,5,"PAUSE"
ldw y,x
ldw y,(y)
addw y,MS
1$: wfi
cpw y,MS
jrne 1$
addw x,#CELLL
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; initialize count down timer
; TIMER ( u -- ) milliseconds
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER TIMER,5,"TIMER"
ldw y,x
ldw y,(y)
ldw CNTDWN,y
addw x,#CELLL
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; check for TIMER exiparition
; TIMEOUT? ( -- 0|-1 )
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER TIMEOUTQ,8,"TIMEOUT?"
clr a
subw x,#CELLL
ldw y,CNTDWN
jrne 1$
cpl a
1$: ld (1,x),a
ld (x),a
ret
;;;;;;;;;;;;;;;;;;;;;
; reboot MCU
; REBOOT ( -- )
;;;;;;;;;;;;;;;;;;;;;
_HEADER reboot,6,"REBOOT"
CALL CR
BTJF UART_SR,#UART_SR_TC,.
jp reset_mcu
;;;;;;;;;;;;;;;;;;;;;;;;;;
; compile to flash memory
; TO-FLASH ( -- )
;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER TOFLASH,8,"TO-FLASH"
call RAMLAST
call AT
call QDUP
call QBRAN
.word 1$
call ABORQ
.byte 29
.ascii " Not while definitions in RAM"
1$: ldw y,#-1
ldw UTFLASH,y
ret
;;;;;;;;;;;;;;;;;;;;;;
; compile to RAM
; TO-RAM ( -- )
;;;;;;;;;;;;;;;;;;;;;;
_HEADER TORAM,6,"TO-RAM"
clrw y
ldw UTFLASH,y
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; BAUD RATE constants table
; values to put in BRR1 & BRR2
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
baudrate:
.byte 0xa0,0x1b ; 2400
.byte 0xd0,0x5 ; 4800
.byte 0x68,0x3 ; 9600
.byte 0x34,0x1 ; 19200
.byte 0x11,0x6 ; 57600
.byte 0x8,0xb ; 115200
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; BAUD RATE CONSTANTS names
; 2400 baud ( -- n )
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER B2K4,4,"B2K4"
subw x,#CELLL
clrw y
ldw (x),y
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; 4800 baud
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER B4K8,4,"B4K8"
subw x,#CELLL
ldw y,#2
ldw (x),y
ret
;;;;;;;;;;;;;;;;;;;;
; 9600 baud
;;;;;;;;;;;;;;;;;;;;
_HEADER B9K6,4,"B9K6"
subw x,#CELLL
ldw y,#4
ldw (x),y
ret
;;;;;;;;;;;;;;
; 19200 baud
;;;;;;;;;;;;;;
_HEADER B19K2,5,"B19K2"
subw x,#CELLL
ldw y,#6
ldw (x),y
ret
;;;;;;;;;;;;;;
; 57600 baud
;;;;;;;;;;;;;;
_HEADER B57K6,5,"B57K6"
subw x,#CELLL
ldw y,#8
ldw (x),y
ret
;;;;;;;;;;;;;;
; 115200 baud
;;;;;;;;;;;;;;
_HEADER B115K2,6,"B115K2"
subw x,#CELLL
ldw y,#10
ldw (x),y
ret
;;;;;;;;;;;;;;;;;;;;;;;
;; set UART2 BAUD rate
; BAUD ( u -- )
;;;;;;;;;;;;;;;;;;;;;;;
_HEADER BAUD,4,"BAUD"
subw x,#CELLL
ldw y,#baudrate
ldw (x),y
call PLUS
ldw y,x
ldw y,(y)
ld a,(y)
push a
incw y
ld a,(y)
ld UART_BRR2,a
pop a
ld UART_BRR1,a
addw x,#CELLL
ret
;; Device dependent I/O
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; ?RX ( -- c T | F )
; Return input character and true, or only false.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER QKEY,4,"?KEY"
TNZ CHAR_RDY
JRNE INCH
SUBW X,#CELLL
CLRW Y
LDW (X),Y
RET
INCH:
SIM
SUBW X, #2*CELLL
LD A, RX_CHAR
CLR (CELLL,X)
LD (CELLL+1,X),A
LDW Y,#-1
LDw (X),Y
CLR CHAR_RDY
RIM
RET
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; TX! ( c -- )
; Send character c to output device.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER EMIT,4,"EMIT"
LD A,(1,X)
ADDW X,#2
putc:
OUTPUT: BTJF UART_SR,#UART_SR_TXE,OUTPUT ;loop until tx empty
LD UART_DR,A ;send A
RET
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; FC-XON ( -- )
; send XON character
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER FC_XON,6,"FC-XON"
subw x,#CELLL
clr (x)
ld a,#XON
ld (1,x),a
call EMIT
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; FC-XOFF ( -- )
; Send XOFF character
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER FC_XOFF,7,"FC-XOFF"
subw x,#CELLL
clr (x)
ld a,#XOFF
ld (1,x),a
call EMIT
ret
;; The kernel
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; doLIT ( -- w )
; Push an inline literal.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
DOLIT:
SUBW X,#2
ldw y,(1,sp)
ldw y,(y)
ldw (x),y
popw y
jp (2,y)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; NEXT ( -- )
; Code for single index loop.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER DONXT,COMPO+4,"NEXT"
LDW Y,(3,SP)
DECW Y
JRPL NEX1 ; jump if N=0
POPW Y
addw sp,#2
JP (2,Y)
NEX1:
LDW (3,SP),Y
POPW Y
LDW Y,(Y)
JP (Y)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; ?branch ( f -- )
; Branch if flag is zero.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _HEADER QBRAN,COMPO+7,"?BRANCH"
QBRAN:
LDW Y,X
ADDW X,#2
LDW Y,(Y)
JREQ BRAN
POPW Y
JP (2,Y)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; TBRANCH ( f -- )
; branch if f==TRUE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _HEADER TBRAN,COMPO+7,"TBRANCH"
TBRAN:
LDW Y,X
ADDW X,#2
LDW Y,(Y)
JRNE BRAN
POPW Y
JP (2,Y)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; branch ( -- )
; Branch to an inline address.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _HEADER BRAN,COMPO+6,"BRANCH"
BRAN:
POPW Y
LDW Y,(Y)
JP (Y)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; EXECUTE ( ca -- )
; Execute word at ca.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_HEADER EXECU,7,"EXECUTE"
LDW Y,X
ADDW X,#CELLL
LDW Y,(Y)
JP (Y)
OPTIMIZE = 1
.if OPTIMIZE
; remplacement de CALL EXIT par
; le opcode de RET.
; Voir modification au code de ";"
.else