From e968148037590b6505855217257babcde1b1c8a5 Mon Sep 17 00:00:00 2001 From: Softcloud Date: Tue, 20 Feb 2024 17:31:34 +0800 Subject: [PATCH] ADD: u256 print. --- interpreter/src/interpreter/executor.rs | 57 ++++++++++++++++++++++++- 1 file changed, 56 insertions(+), 1 deletion(-) diff --git a/interpreter/src/interpreter/executor.rs b/interpreter/src/interpreter/executor.rs index 57128bb3..99f510bd 100644 --- a/interpreter/src/interpreter/executor.rs +++ b/interpreter/src/interpreter/executor.rs @@ -672,7 +672,62 @@ impl<'a> Traversal for Executor<'a> { fn travel_printf(&mut self, node: &PrintfNode) -> NumberResult { let flag_ret = self.travel(&node.flag)?.get_single().get_number(); - if flag_ret == 3 { + if flag_ret == 4 { + let addr = self.travel(&node.val_addr)?.get_single().get_number() as u64; + println!( + "print u256 limbs:={},{},{},{},{},{},{},{}", + self.vm_mem.trace.get(&addr).unwrap().last().unwrap().value, + self.vm_mem + .trace + .get(&(addr + 1)) + .unwrap() + .last() + .unwrap() + .value, + self.vm_mem + .trace + .get(&(addr + 2)) + .unwrap() + .last() + .unwrap() + .value, + self.vm_mem + .trace + .get(&(addr + 3)) + .unwrap() + .last() + .unwrap() + .value, + self.vm_mem + .trace + .get(&(addr + 4)) + .unwrap() + .last() + .unwrap() + .value, + self.vm_mem + .trace + .get(&(addr + 5)) + .unwrap() + .last() + .unwrap() + .value, + self.vm_mem + .trace + .get(&(addr + 6)) + .unwrap() + .last() + .unwrap() + .value, + self.vm_mem + .trace + .get(&(addr + 7)) + .unwrap() + .last() + .unwrap() + .value, + ); + } else if flag_ret == 3 { println!( "print value={}", self.travel(&node.val_addr)?.get_single().get_number()