diff --git a/core/drivers/clk/sam/at91_pmc.h b/core/drivers/clk/sam/at91_pmc.h index 5b4a5547ad6..0eae3a0721a 100644 --- a/core/drivers/clk/sam/at91_pmc.h +++ b/core/drivers/clk/sam/at91_pmc.h @@ -59,7 +59,7 @@ #define AT91_PMC_PLL_UPDT 0x1C #define AT91_PMC_PLL_UPDT_UPDATE BIT(8) #define AT91_PMC_PLL_UPDT_ID BIT(0) -#define AT91_PMC_PLL_UPDT_ID_MSK (0xf) +#define AT91_PMC_PLL_UPDT_ID_MASK GENMASK_32(3, 0) #define AT91_PMC_PLL_UPDT_STUPTIM (0xff << 16) #define AT91_CKGR_MOR 0x20 @@ -137,7 +137,36 @@ #define AT91_PMC_PLLADIV2_ON BIT(12) #define AT91_PMC_H32MXDIV BIT(24) +/* definitions for the PMC register of SAMA7G5 */ +#define AT91_PMC_MCR_V2 0x30 +#define AT91_PMC_MCR_V2_ID_MASK GENMASK_32(3, 0) +#define AT91_PMC_MCR_V2_ID(_id) ((_id) & AT91_PMC_MCR_V2_ID_MASK) +#define AT91_PMC_MCR_V2_CMD BIT(7) +#define AT91_PMC_MCR_V2_DIV_MASK GENMASK_32(10, 8) +#define AT91_PMC_MCR_V2_DIV1 SHIFT_U32(0, 8) +#define AT91_PMC_MCR_V2_DIV2 SHIFT_U32(1, 8) +#define AT91_PMC_MCR_V2_DIV4 SHIFT_U32(2, 8) +#define AT91_PMC_MCR_V2_DIV8 SHIFT_U32(3, 8) +#define AT91_PMC_MCR_V2_DIV16 SHIFT_U32(4, 8) +#define AT91_PMC_MCR_V2_DIV32 SHIFT_U32(5, 8) +#define AT91_PMC_MCR_V2_DIV64 SHIFT_U32(6, 8) +#define AT91_PMC_MCR_V2_DIV3 SHIFT_U32(7, 8) +#define AT91_PMC_MCR_V2_CSS_SHIFT 16 +#define AT91_PMC_MCR_V2_CSS_MASK GENMASK_32(20, 16) +#define AT91_PMC_MCR_V2_CSS_MD_SLCK SHIFT_U32(0, 16) +#define AT91_PMC_MCR_V2_CSS_TD_SLCK SHIFT_U32(1, 16) +#define AT91_PMC_MCR_V2_CSS_MAINCK SHIFT_U32(2, 16) +#define AT91_PMC_MCR_V2_CSS_MCK0 SHIFT_U32(3, 16) +#define AT91_PMC_MCR_V2_CSS_SYSPLL SHIFT_U32(5, 16) +#define AT91_PMC_MCR_V2_CSS_DDRPLL SHIFT_U32(6, 16) +#define AT91_PMC_MCR_V2_CSS_IMGPLL SHIFT_U32(7, 16) +#define AT91_PMC_MCR_V2_CSS_BAUDPLL SHIFT_U32(8, 16) +#define AT91_PMC_MCR_V2_CSS_AUDIOPLL SHIFT_U32(9, 16) +#define AT91_PMC_MCR_V2_CSS_ETHPLL SHIFT_U32(10, 16) +#define AT91_PMC_MCR_V2_EN BIT(28) + #define AT91_PMC_XTALF 0x34 +#define AT91_PMC_XTALF_XTALF 7 #define AT91_PMC_USB 0x38 #define AT91_PMC_USBS (0x1 << 0)