From 62460344de66be7a852c192738a74eb5984805aa Mon Sep 17 00:00:00 2001 From: Tony Han Date: Wed, 9 Aug 2023 15:18:24 +0800 Subject: [PATCH] plat-sam: matrix: update code to be reuseable for sama7g54 Besides sama5d2, sama7g54 also has the matrix. Following changes are done to make the code reuseable for supporting sama7g54: - move definition of "peri_security_array[]" from matrix.c to main.c - replace "matrix32_base()" and "matrix64_base()" with "matrix_base()" - update code according to the above changes Signed-off-by: Tony Han --- core/arch/arm/plat-sam/main.c | 501 +++++++++++++++++++++++++++--- core/arch/arm/plat-sam/matrix.c | 525 +++----------------------------- core/arch/arm/plat-sam/matrix.h | 41 ++- 3 files changed, 548 insertions(+), 519 deletions(-) diff --git a/core/arch/arm/plat-sam/main.c b/core/arch/arm/plat-sam/main.c index f3a077e4ce7..5b2f1115caa 100644 --- a/core/arch/arm/plat-sam/main.c +++ b/core/arch/arm/plat-sam/main.c @@ -44,6 +44,451 @@ #include #include +#define MATRIX_AXIMX 1 +#define MATRIX_H64MX 2 +#define MATRIX_H32MX 3 + +static struct matrix matriies[] = { + {.matrix = MATRIX_H64MX, .base_addr = AT91C_BASE_MATRIX64, .va = 0,}, + {.matrix = MATRIX_H32MX, .base_addr = AT91C_BASE_MATRIX32, .va = 0,}, +}; + +static struct peri_security peri_security_array[] = { + { + .peri_id = AT91C_ID_PMC, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_PMC, + }, + { + .peri_id = AT91C_ID_ARM, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_PIT, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_PITC, + }, + { + .peri_id = AT91C_ID_WDT, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_WDT, + }, + { + .peri_id = AT91C_ID_GMAC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_GMAC, + }, + { + .peri_id = AT91C_ID_XDMAC0, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_XDMAC0, + }, + { + .peri_id = AT91C_ID_XDMAC1, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_XDMAC1, + }, + { + .peri_id = AT91C_ID_ICM, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_ICM, + }, + { + .peri_id = AT91C_ID_AES, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_AES, + }, + { + .peri_id = AT91C_ID_AESB, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_AESB, + }, + { + .peri_id = AT91C_ID_TDES, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_TDES, + }, + { + .peri_id = AT91C_ID_SHA, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SHA, + }, + { + .peri_id = AT91C_ID_MPDDRC, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_MPDDRC, + }, + { + .peri_id = AT91C_ID_MATRIX1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_MATRIX32, + }, + { + .peri_id = AT91C_ID_MATRIX0, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_MATRIX64, + }, + { + .peri_id = AT91C_ID_SECUMOD, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_SECUMOD, + }, + { + .peri_id = AT91C_ID_HSMC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_HSMC, + }, + { + .peri_id = AT91C_ID_PIOA, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_PIOA, + }, + { + .peri_id = AT91C_ID_FLEXCOM0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_FLEXCOM0, + }, + { + .peri_id = AT91C_ID_FLEXCOM1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_FLEXCOM1, + }, + { + .peri_id = AT91C_ID_FLEXCOM2, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_FLEXCOM2, + }, + { + .peri_id = AT91C_ID_FLEXCOM3, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_FLEXCOM3, + }, + { + .peri_id = AT91C_ID_FLEXCOM4, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_FLEXCOM4, + }, + { + .peri_id = AT91C_ID_UART0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_UART0, + }, + { + .peri_id = AT91C_ID_UART1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_UART1, + }, + { + .peri_id = AT91C_ID_UART2, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_UART2, + }, + { + .peri_id = AT91C_ID_UART3, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_UART3, + }, + { + .peri_id = AT91C_ID_UART4, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_UART4, + }, + { + .peri_id = AT91C_ID_TWI0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_TWI0, + }, + { + .peri_id = AT91C_ID_TWI1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_TWI1, + }, + { + .peri_id = AT91C_ID_SDMMC0, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SDHC0, + }, + { + .peri_id = AT91C_ID_SDMMC1, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SDHC1, + }, + { + .peri_id = AT91C_ID_SPI0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SPI0, + }, + { + .peri_id = AT91C_ID_SPI1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SPI1, + }, + { + .peri_id = AT91C_ID_TC0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_TC0, + }, + { + .peri_id = AT91C_ID_TC1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_TC1, + }, + { + .peri_id = AT91C_ID_PWM, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_PWMC, + }, + { + .peri_id = AT91C_ID_ADC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_ADC, + }, + { + .peri_id = AT91C_ID_UHPHS, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_UDPHS, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_UDPHS, + }, + { + .peri_id = AT91C_ID_SSC0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SSC0, + }, + { + .peri_id = AT91C_ID_SSC1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SSC1, + }, + { + .peri_id = AT91C_ID_LCDC, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_LCDC, + }, + { + .peri_id = AT91C_ID_ISI, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_HXISI, + }, + { + .peri_id = AT91C_ID_TRNG, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_TRNG, + }, + { + .peri_id = AT91C_ID_PDMIC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_PDMIC, + }, + { + .peri_id = AT91C_ID_IRQ, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_NS, + }, + { + .peri_id = AT91C_ID_SFC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SFC, + }, + { + .peri_id = AT91C_ID_SECURAM, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_SECURAM, + }, + { + .peri_id = AT91C_ID_QSPI0, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_QSPI0, + }, + { + .peri_id = AT91C_ID_QSPI1, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_QSPI1, + }, + { + .peri_id = AT91C_ID_I2SC0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_I2SC0, + }, + { + .peri_id = AT91C_ID_I2SC1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_I2SC1, + }, + { + .peri_id = AT91C_ID_CAN0_INT0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_CAN1_INT0, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_CLASSD, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_CLASSD, + }, + { + .peri_id = AT91C_ID_SFR, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SFR, + }, + { + .peri_id = AT91C_ID_SAIC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_SAIC, + }, + { + .peri_id = AT91C_ID_AIC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_NS, + .addr = AT91C_BASE_AIC, + }, + { + .peri_id = AT91C_ID_L2CC, + .matrix = MATRIX_H64MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_L2CC, + }, + { + .peri_id = AT91C_ID_CAN0_INT1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_CAN1_INT1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_GMAC_Q1, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_GMAC_Q2, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_PIOB, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_PIOB, + }, + { + .peri_id = AT91C_ID_PIOC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_PIOC, + }, + { + .peri_id = AT91C_ID_PIOD, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_AS, + .addr = AT91C_BASE_PIOD, + }, + { + .peri_id = AT91C_ID_SDMMC0_TIMER, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_SDMMC1_TIMER, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + }, + { + .peri_id = AT91C_ID_SYS, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SYSC, + }, + { + .peri_id = AT91C_ID_ACC, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_ACC, + }, + { + .peri_id = AT91C_ID_RXLP, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_RXLP, + }, + { + .peri_id = AT91C_ID_SFRBU, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_SFRBU, + }, + { + .peri_id = AT91C_ID_CHIPID, + .matrix = MATRIX_H32MX, + .security_type = SECURITY_TYPE_PS, + .addr = AT91C_BASE_CHIPID, + }, +}; + static struct atmel_uart_data console_data; register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE); @@ -59,30 +504,15 @@ register_phys_mem_pgdir(MEM_AREA_IO_SEC, AT91C_BASE_MATRIX32, register_phys_mem_pgdir(MEM_AREA_IO_SEC, AT91C_BASE_MATRIX64, CORE_MMU_PGDIR_SIZE); -vaddr_t matrix32_base(void) +struct peri_security *peri_security_get(unsigned int idx) { - static void *va; - - if (cpu_mmu_enabled()) { - if (!va) - va = phys_to_virt(AT91C_BASE_MATRIX32, MEM_AREA_IO_SEC, - 1); - return (vaddr_t)va; - } - return AT91C_BASE_MATRIX32; + return (idx < ARRAY_SIZE(peri_security_array)) ? + &peri_security_array[idx] : NULL; } -vaddr_t matrix64_base(void) +struct matrix *matrix_get(unsigned int idx) { - static void *va; - - if (cpu_mmu_enabled()) { - if (!va) - va = phys_to_virt(AT91C_BASE_MATRIX64, MEM_AREA_IO_SEC, - 1); - return (vaddr_t)va; - } - return AT91C_BASE_MATRIX64; + return (idx < ARRAY_SIZE(matriies)) ? &matriies[idx] : NULL; } static void matrix_configure_slave_h64mx(void) @@ -108,7 +538,7 @@ static void matrix_configure_slave_h64mx(void) | MATRIX_RDNSECH_NS(2) | MATRIX_WRNSECH_NS(1) | MATRIX_WRNSECH_NS(2)); - matrix_configure_slave_security(matrix64_base(), + matrix_configure_slave_security(matrix_base(MATRIX_H64MX), H64MX_SLAVE_PERI_BRIDGE, srtop_setting, sasplit_setting, @@ -142,11 +572,12 @@ static void matrix_configure_slave_h64mx(void) | MATRIX_WRNSECH_NS(3)); /* DDR port 0 not used from NWd */ for (ddr_port = 1; ddr_port < 8; ddr_port++) { - matrix_configure_slave_security(matrix64_base(), - (H64MX_SLAVE_DDR2_PORT_0 + ddr_port), - srtop_setting, - sasplit_setting, - ssr_setting); + matrix_configure_slave_security(matrix_base(MATRIX_H64MX), + (H64MX_SLAVE_DDR2_PORT_0 + + ddr_port), + srtop_setting, + sasplit_setting, + ssr_setting); } /* @@ -158,7 +589,7 @@ static void matrix_configure_slave_h64mx(void) sasplit_setting = MATRIX_SASPLIT(0, MATRIX_SRTOP_VALUE_64K); ssr_setting = (MATRIX_LANSECH_S(0) | MATRIX_RDNSECH_S(0) | MATRIX_WRNSECH_S(0)); - matrix_configure_slave_security(matrix64_base(), + matrix_configure_slave_security(matrix_base(MATRIX_H64MX), H64MX_SLAVE_INTERNAL_SRAM, srtop_setting, sasplit_setting, ssr_setting); @@ -172,10 +603,12 @@ static void matrix_configure_slave_h64mx(void) ssr_setting = MATRIX_LANSECH_NS(0) | MATRIX_RDNSECH_NS(0) | MATRIX_WRNSECH_NS(0); - matrix_configure_slave_security(matrix64_base(), H64MX_SLAVE_QSPI0, + matrix_configure_slave_security(matrix_base(MATRIX_H64MX), + H64MX_SLAVE_QSPI0, srtop_setting, sasplit_setting, ssr_setting); - matrix_configure_slave_security(matrix64_base(), H64MX_SLAVE_QSPI1, + matrix_configure_slave_security(matrix_base(MATRIX_H64MX), + H64MX_SLAVE_QSPI1, srtop_setting, sasplit_setting, ssr_setting); /* 14: AESB: Default */ @@ -210,7 +643,7 @@ static void matrix_configure_slave_h32mx(void) ssr_setting |= (MATRIX_LANSECH_NS(7) | MATRIX_RDNSECH_NS(7) | MATRIX_WRNSECH_NS(7)); - matrix_configure_slave_security(matrix32_base(), + matrix_configure_slave_security(matrix_base(MATRIX_H32MX), H32MX_EXTERNAL_EBI, srtop_setting, sasplit_setting, @@ -222,7 +655,7 @@ static void matrix_configure_slave_h32mx(void) ssr_setting = (MATRIX_LANSECH_NS(0) | MATRIX_RDNSECH_NS(0) | MATRIX_WRNSECH_NS(0)); - matrix_configure_slave_security(matrix32_base(), + matrix_configure_slave_security(matrix_base(MATRIX_H32MX), H32MX_NFC_SRAM, srtop_setting, sasplit_setting, @@ -248,7 +681,7 @@ static void matrix_configure_slave_h32mx(void) | MATRIX_WRNSECH_NS(0) | MATRIX_WRNSECH_NS(1) | MATRIX_WRNSECH_NS(2)); - matrix_configure_slave_security(matrix32_base(), + matrix_configure_slave_security(matrix_base(MATRIX_H32MX), H32MX_USB, srtop_setting, sasplit_setting, @@ -323,8 +756,8 @@ static unsigned int security_ps_peri_id[] = { static int matrix_init(void) { - matrix_write_protect_disable(matrix64_base()); - matrix_write_protect_disable(matrix32_base()); + matrix_write_protect_disable(matrix_base(MATRIX_H64MX)); + matrix_write_protect_disable(matrix_base(MATRIX_H32MX)); matrix_configure_slave_h64mx(); matrix_configure_slave_h32mx(); diff --git a/core/arch/arm/plat-sam/matrix.c b/core/arch/arm/plat-sam/matrix.c index c0a39e57b1d..126950f3490 100644 --- a/core/arch/arm/plat-sam/matrix.c +++ b/core/arch/arm/plat-sam/matrix.c @@ -38,463 +38,9 @@ #include #include -#define MATRIX_AXIMX 1 -#define MATRIX_H64MX 2 -#define MATRIX_H32MX 3 - -#define SECURITY_TYPE_AS 1 -#define SECURITY_TYPE_NS 2 -#define SECURITY_TYPE_PS 3 - #define WORLD_NON_SECURE 0 #define WORLD_SECURE 1 -#define MATRIX_SPSELR_COUNT 3 -#define MATRIX_SLAVE_COUNT 15 - -struct peri_security { - unsigned int peri_id; - unsigned int matrix; - unsigned int security_type; - paddr_t addr; -}; - -static const struct peri_security peri_security_array[] = { - { - .peri_id = AT91C_ID_PMC, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_PMC, - }, - { - .peri_id = AT91C_ID_ARM, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_PIT, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_PITC, - }, - { - .peri_id = AT91C_ID_WDT, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_WDT, - }, - { - .peri_id = AT91C_ID_GMAC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_GMAC, - }, - { - .peri_id = AT91C_ID_XDMAC0, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_XDMAC0, - }, - { - .peri_id = AT91C_ID_XDMAC1, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_XDMAC1, - }, - { - .peri_id = AT91C_ID_ICM, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_ICM, - }, - { - .peri_id = AT91C_ID_AES, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_AES, - }, - { - .peri_id = AT91C_ID_AESB, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_AESB, - }, - { - .peri_id = AT91C_ID_TDES, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_TDES, - }, - { - .peri_id = AT91C_ID_SHA, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SHA, - }, - { - .peri_id = AT91C_ID_MPDDRC, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_MPDDRC, - }, - { - .peri_id = AT91C_ID_MATRIX1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_MATRIX32, - }, - { - .peri_id = AT91C_ID_MATRIX0, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_MATRIX64, - }, - { - .peri_id = AT91C_ID_SECUMOD, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_SECUMOD, - }, - { - .peri_id = AT91C_ID_HSMC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_HSMC, - }, - { - .peri_id = AT91C_ID_PIOA, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_PIOA, - }, - { - .peri_id = AT91C_ID_FLEXCOM0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_FLEXCOM0, - }, - { - .peri_id = AT91C_ID_FLEXCOM1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_FLEXCOM1, - }, - { - .peri_id = AT91C_ID_FLEXCOM2, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_FLEXCOM2, - }, - { - .peri_id = AT91C_ID_FLEXCOM3, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_FLEXCOM3, - }, - { - .peri_id = AT91C_ID_FLEXCOM4, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_FLEXCOM4, - }, - { - .peri_id = AT91C_ID_UART0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_UART0, - }, - { - .peri_id = AT91C_ID_UART1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_UART1, - }, - { - .peri_id = AT91C_ID_UART2, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_UART2, - }, - { - .peri_id = AT91C_ID_UART3, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_UART3, - }, - { - .peri_id = AT91C_ID_UART4, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_UART4, - }, - { - .peri_id = AT91C_ID_TWI0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_TWI0, - }, - { - .peri_id = AT91C_ID_TWI1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_TWI1, - }, - { - .peri_id = AT91C_ID_SDMMC0, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SDHC0, - }, - { - .peri_id = AT91C_ID_SDMMC1, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SDHC1, - }, - { - .peri_id = AT91C_ID_SPI0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SPI0, - }, - { - .peri_id = AT91C_ID_SPI1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SPI1, - }, - { - .peri_id = AT91C_ID_TC0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_TC0, - }, - { - .peri_id = AT91C_ID_TC1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_TC1, - }, - { - .peri_id = AT91C_ID_PWM, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_PWMC, - }, - { - .peri_id = AT91C_ID_ADC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_ADC, - }, - { - .peri_id = AT91C_ID_UHPHS, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_UDPHS, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_UDPHS, - }, - { - .peri_id = AT91C_ID_SSC0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SSC0, - }, - { - .peri_id = AT91C_ID_SSC1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SSC1, - }, - { - .peri_id = AT91C_ID_LCDC, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_LCDC, - }, - { - .peri_id = AT91C_ID_ISI, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_HXISI, - }, - { - .peri_id = AT91C_ID_TRNG, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_TRNG, - }, - { - .peri_id = AT91C_ID_PDMIC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_PDMIC, - }, - { - .peri_id = AT91C_ID_IRQ, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_NS, - }, - { - .peri_id = AT91C_ID_SFC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SFC, - }, - { - .peri_id = AT91C_ID_SECURAM, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_SECURAM, - }, - { - .peri_id = AT91C_ID_QSPI0, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_QSPI0, - }, - { - .peri_id = AT91C_ID_QSPI1, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_QSPI1, - }, - { - .peri_id = AT91C_ID_I2SC0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_I2SC0, - }, - { - .peri_id = AT91C_ID_I2SC1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_I2SC1, - }, - { - .peri_id = AT91C_ID_CAN0_INT0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_CAN1_INT0, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_CLASSD, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_CLASSD, - }, - { - .peri_id = AT91C_ID_SFR, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SFR, - }, - { - .peri_id = AT91C_ID_SAIC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_SAIC, - }, - { - .peri_id = AT91C_ID_AIC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_NS, - .addr = AT91C_BASE_AIC, - }, - { - .peri_id = AT91C_ID_L2CC, - .matrix = MATRIX_H64MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_L2CC, - }, - { - .peri_id = AT91C_ID_CAN0_INT1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_CAN1_INT1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_GMAC_Q1, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_GMAC_Q2, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_PIOB, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_PIOB, - }, - { - .peri_id = AT91C_ID_PIOC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_PIOC, - }, - { - .peri_id = AT91C_ID_PIOD, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_AS, - .addr = AT91C_BASE_PIOD, - }, - { - .peri_id = AT91C_ID_SDMMC0_TIMER, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_SDMMC1_TIMER, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - }, - { - .peri_id = AT91C_ID_SYS, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SYSC, - }, - { - .peri_id = AT91C_ID_ACC, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_ACC, - }, - { - .peri_id = AT91C_ID_RXLP, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_RXLP, - }, - { - .peri_id = AT91C_ID_SFRBU, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_SFRBU, - }, - { - .peri_id = AT91C_ID_CHIPID, - .matrix = MATRIX_H32MX, - .security_type = SECURITY_TYPE_PS, - .addr = AT91C_BASE_CHIPID, - }, -}; - static void matrix_write(unsigned int base, unsigned int offset, const unsigned int value) @@ -507,6 +53,28 @@ static unsigned int matrix_read(int base, unsigned int offset) return io_read32(offset + base); } +vaddr_t matrix_base(unsigned int matrix) +{ + unsigned int i = 0; + struct matrix *pmatrix; + + while ((pmatrix = matrix_get(i++)) != NULL) { + if (pmatrix->matrix == matrix) + break; + } + if (pmatrix) { + if (cpu_mmu_enabled()) { + if (!pmatrix->va) + pmatrix->va = phys_to_virt(pmatrix->base_addr, + MEM_AREA_IO_SEC, 1); + return (vaddr_t)pmatrix->va; + } + return pmatrix->base_addr; + } + panic("Invalid matrix"); + return -1; +} + void matrix_write_protect_enable(unsigned int matrix_base) { matrix_write(matrix_base, MATRIX_WPMR, @@ -531,11 +99,12 @@ void matrix_configure_slave_security(unsigned int matrix_base, static const struct peri_security *get_peri_security(unsigned int peri_id) { - unsigned int i; + unsigned int i = 0; + struct peri_security *p; - for (i = 0; i < ARRAY_SIZE(peri_security_array); i++) { - if (peri_id == peri_security_array[i].peri_id) - return &peri_security_array[i]; + while ((p = peri_security_get(i++)) != NULL) { + if (peri_id == p->peri_id) + return p; } return NULL; @@ -555,12 +124,7 @@ static int matrix_set_periph_world(unsigned int matrix, unsigned int peri_id, bit = (0x01 << (peri_id % 32)); - if (matrix == MATRIX_H32MX) - base = matrix32_base(); - else if (matrix == MATRIX_H64MX) - base = matrix64_base(); - else - return -1; + base = matrix_base(matrix); spselr = matrix_read(base, MATRIX_SPSELR(idx)); if (world == WORLD_SECURE) @@ -576,14 +140,15 @@ TEE_Result matrix_dt_get_id(const void *fdt, int node, unsigned int *id) { unsigned int i = 0; paddr_t pbase = 0; + struct peri_security *p; pbase = fdt_reg_base_address(fdt, node); if (pbase == DT_INFO_INVALID_REG) return TEE_ERROR_BAD_PARAMETERS; - for (i = 0; i < ARRAY_SIZE(peri_security_array); i++) { - if (peri_security_array[i].addr == pbase) { - *id = peri_security_array[i].peri_id; + while ((p = peri_security_get(i++)) != NULL) { + if (p->addr == pbase) { + *id = p->peri_id; return TEE_SUCCESS; } } @@ -638,17 +203,6 @@ int matrix_configure_periph_non_secure(unsigned int *peri_id_array, } #ifdef CFG_PM_ARM32 -struct matrix_state { - uint32_t spselr[MATRIX_SPSELR_COUNT]; - uint32_t ssr[MATRIX_SLAVE_COUNT]; - uint32_t srtsr[MATRIX_SLAVE_COUNT]; - uint32_t sassr[MATRIX_SLAVE_COUNT]; - uint32_t meier; - uint32_t meimr; -}; - -static struct matrix_state matrix32_state; -static struct matrix_state matrix64_state; static void matrix_save_regs(vaddr_t base, struct matrix_state *state) { @@ -669,8 +223,11 @@ static void matrix_save_regs(vaddr_t base, struct matrix_state *state) static void matrix_suspend(void) { - matrix_save_regs(matrix32_base(), &matrix32_state); - matrix_save_regs(matrix64_base(), &matrix64_state); + unsigned int i = 0; + struct matrix *pmatrix; + + while ((pmatrix = matrix_get(i++)) != NULL) + matrix_save_regs(matrix_base(pmatrix->matrix), &pmatrix->state); } static void matrix_restore_regs(vaddr_t base, struct matrix_state *state) @@ -694,8 +251,12 @@ static void matrix_restore_regs(vaddr_t base, struct matrix_state *state) static void matrix_resume(void) { - matrix_restore_regs(matrix32_base(), &matrix32_state); - matrix_restore_regs(matrix64_base(), &matrix64_state); + unsigned int i = 0; + struct matrix *pmatrix; + + while ((pmatrix = matrix_get(i++)) != NULL) + matrix_restore_regs(matrix_base(pmatrix->matrix), + &pmatrix->state); } static TEE_Result matrix_pm(enum pm_op op, uint32_t pm_hint __unused, diff --git a/core/arch/arm/plat-sam/matrix.h b/core/arch/arm/plat-sam/matrix.h index 216905720dc..b6c372cf11c 100644 --- a/core/arch/arm/plat-sam/matrix.h +++ b/core/arch/arm/plat-sam/matrix.h @@ -31,6 +31,44 @@ #include +#define SECURITY_TYPE_AS 1 +#define SECURITY_TYPE_NS 2 +#define SECURITY_TYPE_PS 3 + +#define MATRIX_SPSELR_COUNT 3 +#define MATRIX_SLAVE_COUNT 15 + +#ifdef CFG_PM_ARM32 + struct matrix_state { + uint32_t spselr[MATRIX_SPSELR_COUNT]; + uint32_t ssr[MATRIX_SLAVE_COUNT]; + uint32_t srtsr[MATRIX_SLAVE_COUNT]; + uint32_t sassr[MATRIX_SLAVE_COUNT]; + uint32_t meier; + uint32_t meimr; + }; +#endif + +struct matrix { + unsigned int matrix; + paddr_t base_addr; + void *va; +#ifdef CFG_PM_ARM32 + struct matrix_state state; +#endif +}; + +struct peri_security { + unsigned int peri_id; + unsigned int matrix; + unsigned int security_type; + paddr_t addr; +}; + +struct peri_security *peri_security_get(unsigned int idx); +struct matrix *matrix_get(unsigned int idx); +vaddr_t matrix_base(unsigned int matrix); + extern void matrix_write_protect_enable(unsigned int matrix_base); extern void matrix_write_protect_disable(unsigned int matrix_base); extern void matrix_configure_slave_security(unsigned int matrix_base, @@ -44,7 +82,4 @@ int matrix_configure_periph_non_secure(unsigned int *peri_id_array, int matrix_configure_periph_secure(unsigned int peri_id); TEE_Result matrix_dt_get_id(const void *fdt, int node, unsigned int *id); -vaddr_t matrix32_base(void); -vaddr_t matrix64_base(void); - #endif /* #ifndef MATRIX_H */