FINN v0.8.1 released

[auphelia]

We are excited to announce the release of FINN v0.8.1!
Warning: Please do not use release v0.8 as it was broken due to a faulty merge, use v0.8.1 instead.

Please find below a summary of the highlights of this release.

New Maintainers for FINN

The FINN compiler is now maintained by Jakoba Petri-Koenig (@auphelia), with Thomas Preusser (@preusser) as the project lead and finn-hlslib maintainer. Yaman Umuroglu (@maltanar) is retiring as the lead developer for the FINN compiler but will continue supporting the development for a period of time.

Vitis 2022.1 Support

FINN now runs with the latest AMD tools. For this, the finn-hlslib has been changed to switch the layer implementations from Vivado HLS to Vitis HLS. You can now use FINN with Vitis 2022.1! We have also added experimental support for the Alveo platforms, so you can experiment with the latest XRT version and different platforms.

StreamingFCLayer becomes MatrixVectorActivation

The finn-hlslib has been pruned of this thin adapter functions representing a fully connected layer as the FINN compiler had already been targeting the underlying kernel function directly.

Using FINN-Generated Artifacts outside Docker

Sometimes you may want to re-run synthesis or other FPGA flows on FINN-generated components for debugging or making manual edits. In previous FINN releases, a lot of the paths for build flows were hard-coded in the generated files and only worked inside the FINN Docker container, which made this difficult. We’ve now re-factored FINN to make this much easier – you only need to set up one environment variable, and you can work with FINN-generated artifacts outside of Docker too.
Detailed Information

New Tutorial: Vivado Flow and SystemVerilog Testbench

Although FINN offers built-in flows for targeting PYNQ boards and some Alveo platforms, seasoned FPGA developers may want to integrate FINN-generated NN accelerators manually into a larger FPGA design using Vivado IP Integrator. Thanks to a contribution by John Terry (@jterry-x), we now have a new tutorial showing how to work with a FINN-generated accelerator and simulate it using a SystemVerilog testbench.
Detailed Information

finn-base Code Migration and Deprecation

As part of the process of transitioning to QONNX, the FINN compiler is no longer dependent on the finn-base repo. The majority of the compiler infrastructure has now moved to the QONNX repo, while other functionality has moved back into the FINN compiler repo and the FINN fork of pyverilator.

Other New Features

• Additional layer types (Embedding Layer, Checksum Layer, Concat Layer)
• Better stitching and driver support for networks with multiple input and output tensors
• Folding support for MaxPool Layer
• Optimized SWGs for 1D convolutions

[maltanar]

Quick heads-up: we just noticed that something went wrong while doing the v0.8 release on 13th July 2022. Please don't use the v0.8 tag, use the v0.8.1 tag instead.