diff --git a/runtime_lib/CMakeLists.txt b/runtime_lib/CMakeLists.txt index 48f37eed16..b0983d69e9 100644 --- a/runtime_lib/CMakeLists.txt +++ b/runtime_lib/CMakeLists.txt @@ -111,6 +111,7 @@ foreach(target ${AIE_RUNTIME_TARGETS}) -DLibXAIE_INC_DIR=${XILINX_XAIE_INCLUDE_DIR} -DVITIS_ROOT=${VITIS_ROOT} -DVITIS_AIETOOLS_DIR=${VITIS_AIETOOLS_DIR} + -DXRT_ROOT=${XRT_ROOT} -DSysroot=${Sysroot} -Dhsa-runtime64_DIR=${hsa-runtime64_DIR} -Dhsakmt_DIR=${hsakmt_DIR} diff --git a/runtime_lib/test_lib/CMakeLists.txt b/runtime_lib/test_lib/CMakeLists.txt index 2a97e07c89..2e04f1b54f 100644 --- a/runtime_lib/test_lib/CMakeLists.txt +++ b/runtime_lib/test_lib/CMakeLists.txt @@ -8,6 +8,7 @@ cmake_minimum_required(VERSION 3.21) project("test lib for ${AIE_RUNTIME_TARGET}") +# test_lib library add_library(test_lib STATIC test_library.cpp) set(TEST_LIB_PUBLIC_HEADERS test_library.h @@ -40,8 +41,23 @@ if (${AIE_RUNTIME_TARGET} STREQUAL "x86_64-hsa") endif() -# copy header and source files into build area -set(headers target.h test_library.h memory_allocator.h hsa_ext_air.h) +find_package(XRT) +set(BUILD_TEST_UTILS ${XRT_FOUND} AND NOT ${AIE_RUNTIME_TARGET} STREQUAL "x86_64-hsa") + +# test_utils library +if (${BUILD_TEST_UTILS}) + add_library(test_utils STATIC test_utils.cpp) + set_target_properties(test_utils PROPERTIES PUBLIC_HEADER test_utils.h) + target_compile_options(test_utils PRIVATE -fPIC) + + target_include_directories(test_utils PRIVATE + ${LibXAIE_INC_DIR} + ${XRT_INCLUDE_DIR} + ) +endif() + +# copy test_library and test_utils header files into build area +set(headers target.h test_library.h test_utils.h memory_allocator.h hsa_ext_air.h) foreach(basefile ${headers}) set(dest ${CMAKE_CURRENT_BINARY_DIR}/../include/${basefile}) add_custom_target(aie-copy-runtime-libs-${basefile} ALL DEPENDS ${dest}) @@ -51,7 +67,8 @@ foreach(basefile ${headers}) ) endforeach() -set(files test_library.cpp) +# copy test_library and test_utils source files into build area +set(files test_library.cpp test_utils.cpp) foreach(basefile ${files}) set(dest ${CMAKE_CURRENT_BINARY_DIR}/../src/${basefile}) add_custom_target(aie-copy-runtime-libs-${basefile} ALL DEPENDS ${dest}) @@ -65,10 +82,21 @@ install(TARGETS test_lib ARCHIVE DESTINATION ${CMAKE_INSTALL_PREFIX}/runtime_lib/${AIE_RUNTIME_TARGET}/test_lib/lib PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_PREFIX}/runtime_lib/${AIE_RUNTIME_TARGET}/test_lib/include ) +if (${BUILD_TEST_UTILS}) + install(TARGETS test_utils + ARCHIVE DESTINATION ${CMAKE_INSTALL_PREFIX}/runtime_lib/${AIE_RUNTIME_TARGET}/test_lib/lib + PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_PREFIX}/runtime_lib/${AIE_RUNTIME_TARGET}/test_lib/include + ) +endif() install(FILES test_library.cpp DESTINATION ${CMAKE_INSTALL_PREFIX}/runtime_lib/${AIE_RUNTIME_TARGET}/test_lib/src) set(xaienginePath ${VITIS_AIETOOLS_DIR}/include/drivers/aiengine) -# Memory Allocator + +# +# Memory Allocator libraries +# + +# ion memory allocator library add_library(memory_allocator_ion STATIC memory_allocator_ion.cpp) set(ION_PUBLIC_HEADERS memory_allocator.h @@ -93,7 +121,7 @@ install(TARGETS memory_allocator_ion PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_PREFIX}/runtime_lib/${AIE_RUNTIME_TARGET}/test_lib/include ) -# If we are compiling x86_64 HSA runtime, need to link against HSA +# HSA memory allocator library if (${AIE_RUNTIME_TARGET} STREQUAL "x86_64-hsa") add_library(memory_allocator_hsa STATIC memory_allocator_hsa.cpp) set_target_properties(memory_allocator_hsa PROPERTIES PUBLIC_HEADER "memory_allocator.h") @@ -113,6 +141,7 @@ if (${AIE_RUNTIME_TARGET} STREQUAL "x86_64-hsa") ) endif() +# simulation memory allocator library if (VITIS_ROOT) add_library(memory_allocator_sim_aie STATIC memory_allocator.cpp) target_compile_options(memory_allocator_sim_aie PRIVATE -fPIC) diff --git a/runtime_lib/test_lib/test_utils.cpp b/runtime_lib/test_lib/test_utils.cpp index daf08502c4..8aaaf44b15 100644 --- a/runtime_lib/test_lib/test_utils.cpp +++ b/runtime_lib/test_lib/test_utils.cpp @@ -93,6 +93,21 @@ std::vector test_utils::load_instr_sequence(std::string instr_path) { return instr_v; } +std::vector test_utils::load_instr_binary(std::string instr_path) { + std::ifstream instr_file(instr_path); + if (!instr_file.is_open()) { + throw std::runtime_error("Unable to open instruction file\n"); + } + // read size of file, reserve space in instr_v, then read the file into + // instr_v + instr_file.seekg(0, instr_file.end); + int size = instr_file.tellg(); + instr_file.seekg(0, instr_file.beg); + std::vector instr_v(size / 4); + instr_file.read(reinterpret_cast(instr_v.data()), size); + return instr_v; +} + // -------------------------------------------------------------------------- // XRT // -------------------------------------------------------------------------- diff --git a/runtime_lib/test_lib/test_utils.h b/runtime_lib/test_lib/test_utils.h index 003274fbf8..4084ff95de 100644 --- a/runtime_lib/test_lib/test_utils.h +++ b/runtime_lib/test_lib/test_utils.h @@ -42,6 +42,7 @@ void parse_options(int argc, const char *argv[], po::options_description &desc, po::variables_map &vm); std::vector load_instr_sequence(std::string instr_path); +std::vector load_instr_binary(std::string instr_path); void init_xrt_load_kernel(xrt::device &device, xrt::kernel &kernel, int verbosity, std::string xclbinFileName, diff --git a/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir b/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir index 02a31927cc..dfc08007da 100755 --- a/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir +++ b/test/benchmarks/01_DDR_SHIM_LM_FillRate/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark01_DDR_SHIM_fill_rate { diff --git a/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir b/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir index 00c411181b..378fa63059 100755 --- a/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir +++ b/test/benchmarks/02_LM_SHIM_DDR_FillRate/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark_02_LM2DDR { diff --git a/test/benchmarks/03_Flood_DDR/aie.mlir b/test/benchmarks/03_Flood_DDR/aie.mlir index f5d92661d8..63f0722bb4 100755 --- a/test/benchmarks/03_Flood_DDR/aie.mlir +++ b/test/benchmarks/03_Flood_DDR/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark03_Flood_DDR { diff --git a/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir b/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir index 7baeef71ec..e6aae36cd5 100755 --- a/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir +++ b/test/benchmarks/04_Tile_Tile_FillRate/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @test04_tile_tiledma { diff --git a/test/benchmarks/05_Core_Startup/aie.mlir b/test/benchmarks/05_Core_Startup/aie.mlir index fbb8303c17..dbbe273d75 100755 --- a/test/benchmarks/05_Core_Startup/aie.mlir +++ b/test/benchmarks/05_Core_Startup/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark05_core_startup { diff --git a/test/benchmarks/06_Buffer_Store/aie.mlir b/test/benchmarks/06_Buffer_Store/aie.mlir index cdfda418cc..34786b5bb1 100755 --- a/test/benchmarks/06_Buffer_Store/aie.mlir +++ b/test/benchmarks/06_Buffer_Store/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark06_buffer_store { diff --git a/test/benchmarks/07_Lock_Acquire/aie.mlir b/test/benchmarks/07_Lock_Acquire/aie.mlir index 2d85d0af94..b0c2db26bb 100755 --- a/test/benchmarks/07_Lock_Acquire/aie.mlir +++ b/test/benchmarks/07_Lock_Acquire/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark07_lock_acquire { diff --git a/test/benchmarks/08_Lock_Release/aie.mlir b/test/benchmarks/08_Lock_Release/aie.mlir index 86881fb26f..6369e6f95e 100755 --- a/test/benchmarks/08_Lock_Release/aie.mlir +++ b/test/benchmarks/08_Lock_Release/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark06_lock_release { diff --git a/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir b/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir index 104d6f6dd8..2238bc33a5 100755 --- a/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir +++ b/test/benchmarks/09_Shim_Broadcast_Horizontal/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark09_shim_broadcast { diff --git a/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir b/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir index 670d09afb4..52f80b560b 100755 --- a/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir +++ b/test/benchmarks/10_Tile_Broadcast_Horizontal/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark10_tile_broadcast_horizontal { diff --git a/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir b/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir index 0727d14581..4b30f0908d 100755 --- a/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir +++ b/test/benchmarks/11_Tile_Broadcast_Vertical/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark11_tile_broadcast_vertical { diff --git a/test/benchmarks/12_Stream_Delay/aie.mlir b/test/benchmarks/12_Stream_Delay/aie.mlir index 4b59061cba..693a4a64bd 100755 --- a/test/benchmarks/12_Stream_Delay/aie.mlir +++ b/test/benchmarks/12_Stream_Delay/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @test12_stream_delay { diff --git a/test/benchmarks/13_Program_Counter/aie.mlir b/test/benchmarks/13_Program_Counter/aie.mlir index 3375e9eb10..c4efa1fc2f 100755 --- a/test/benchmarks/13_Program_Counter/aie.mlir +++ b/test/benchmarks/13_Program_Counter/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark13_program_counter { diff --git a/test/benchmarks/14_Timer/aie.mlir b/test/benchmarks/14_Timer/aie.mlir index 9099cb231f..4fbc6e5b75 100755 --- a/test/benchmarks/14_Timer/aie.mlir +++ b/test/benchmarks/14_Timer/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @benchmark14_timer { diff --git a/test/lit.cfg.py b/test/lit.cfg.py index b7fbfc2e1f..1cd347942b 100644 --- a/test/lit.cfg.py +++ b/test/lit.cfg.py @@ -44,13 +44,25 @@ config.substitutions.append( ("%aie_runtime_lib%", os.path.join(config.aie_obj_root, "aie_runtime_lib")) ) +config.substitutions.append(("%aietools", config.vitis_aietools_dir)) + +test_lib_path = os.path.join( + config.aie_obj_root, "runtime_lib", config.aieHostTarget, "test_lib" +) config.substitutions.append( ( - "%host_runtime_lib%", - os.path.join(config.aie_obj_root, "runtime_lib", config.aieHostTarget), + "%test_lib_flags", + f"-I{test_lib_path}/include -L{test_lib_path}/lib -ltest_lib", ) ) -config.substitutions.append(("%aietools", config.vitis_aietools_dir)) +config.substitutions.append( + ( + "%test_utils_flags", + "-lboost_program_options -lboost_filesystem " + + f"-I{test_lib_path}/include -L{test_lib_path}/lib -ltest_utils", + ) +) + # for xchesscc_wrapper llvm_config.with_environment("AIETOOLS", config.vitis_aietools_dir) # for peano clang diff --git a/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/test.cpp b/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/test.cpp index bb95ddfb4e..51634dea84 100644 --- a/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/test.cpp +++ b/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/test.cpp @@ -19,29 +19,16 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 61 * 56; constexpr int OUT_SIZE = 64 * 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/add_21_i8_using_dma_op_with_padding/test.cpp b/test/npu-xrt/add_21_i8_using_dma_op_with_padding/test.cpp index 8467923480..ffc8a05640 100644 --- a/test/npu-xrt/add_21_i8_using_dma_op_with_padding/test.cpp +++ b/test/npu-xrt/add_21_i8_using_dma_op_with_padding/test.cpp @@ -19,29 +19,16 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 32; constexpr int OUT_SIZE = 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit index 44823b106f..f3c2cbca03 100644 --- a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit +++ b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/test.cpp b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/test.cpp index 06c072b47a..24c3940ca5 100644 --- a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/test.cpp +++ b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/test.cpp @@ -19,26 +19,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/add_314_using_dma_op/run.lit b/test/npu-xrt/add_314_using_dma_op/run.lit index 2d192ee5d6..5e6286aa89 100644 --- a/test/npu-xrt/add_314_using_dma_op/run.lit +++ b/test/npu-xrt/add_314_using_dma_op/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_314_using_dma_op/test.cpp b/test/npu-xrt/add_314_using_dma_op/test.cpp index d2d192b5b5..884e734fd0 100644 --- a/test/npu-xrt/add_314_using_dma_op/test.cpp +++ b/test/npu-xrt/add_314_using_dma_op/test.cpp @@ -19,26 +19,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit index 2d192ee5d6..5e6286aa89 100644 --- a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit +++ b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/test.cpp b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/test.cpp index 31384ac275..dbf0dc44cd 100644 --- a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/test.cpp +++ b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/test.cpp @@ -19,26 +19,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 52; constexpr int OUT_SIZE = 64; -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/add_blockwrite/run.lit b/test/npu-xrt/add_blockwrite/run.lit index 35aa0b374d..0d76390b3b 100644 --- a/test/npu-xrt/add_blockwrite/run.lit +++ b/test/npu-xrt/add_blockwrite/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --basic-alloc-scheme --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_blockwrite/test.cpp b/test/npu-xrt/add_blockwrite/test.cpp index b97c5c97c8..45764feb74 100644 --- a/test/npu-xrt/add_blockwrite/test.cpp +++ b/test/npu-xrt/add_blockwrite/test.cpp @@ -20,39 +20,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -82,11 +56,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/add_maskwrite/run.lit b/test/npu-xrt/add_maskwrite/run.lit index 35aa0b374d..0d76390b3b 100644 --- a/test/npu-xrt/add_maskwrite/run.lit +++ b/test/npu-xrt/add_maskwrite/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --basic-alloc-scheme --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_maskwrite/test.cpp b/test/npu-xrt/add_maskwrite/test.cpp index 0fa849cbed..104e5ead43 100644 --- a/test/npu-xrt/add_maskwrite/test.cpp +++ b/test/npu-xrt/add_maskwrite/test.cpp @@ -20,39 +20,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -82,11 +56,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/add_one_ctrl_packet/run.lit b/test/npu-xrt/add_one_ctrl_packet/run.lit index f08641410e..2c08faa957 100644 --- a/test/npu-xrt/add_one_ctrl_packet/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --basic-alloc-scheme --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_one_ctrl_packet/test.cpp b/test/npu-xrt/add_one_ctrl_packet/test.cpp index b4a848639c..68a7f4422c 100644 --- a/test/npu-xrt/add_one_ctrl_packet/test.cpp +++ b/test/npu-xrt/add_one_ctrl_packet/test.cpp @@ -20,38 +20,12 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -81,11 +55,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit b/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit index f08641410e..acc723cb04 100644 --- a/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit @@ -4,7 +4,6 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --basic-alloc-scheme --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall -lrt -lstdc++ %xrt_flags %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! - diff --git a/test/npu-xrt/add_one_ctrl_packet_4_cores/test.cpp b/test/npu-xrt/add_one_ctrl_packet_4_cores/test.cpp index 495c140f34..ccfef64dc2 100644 --- a/test/npu-xrt/add_one_ctrl_packet_4_cores/test.cpp +++ b/test/npu-xrt/add_one_ctrl_packet_4_cores/test.cpp @@ -20,40 +20,14 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int CTRL_IN_SIZE = 64; constexpr int CTRL_OUT_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -83,11 +57,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit b/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit index 1ad5f311fc..36cb1172a4 100644 --- a/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --basic-alloc-scheme --generate-ctrl-pkt-overlay --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_one_ctrl_packet_col_overlay/test.cpp b/test/npu-xrt/add_one_ctrl_packet_col_overlay/test.cpp index 495c140f34..ccfef64dc2 100644 --- a/test/npu-xrt/add_one_ctrl_packet_col_overlay/test.cpp +++ b/test/npu-xrt/add_one_ctrl_packet_col_overlay/test.cpp @@ -20,40 +20,14 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int CTRL_IN_SIZE = 64; constexpr int CTRL_OUT_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -83,11 +57,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/add_one_objFifo/CMakeLists.txt b/test/npu-xrt/add_one_objFifo/CMakeLists.txt deleted file mode 100644 index cf966ccb55..0000000000 --- a/test/npu-xrt/add_one_objFifo/CMakeLists.txt +++ /dev/null @@ -1,71 +0,0 @@ -# This file is licensed under the Apache License v2.0 with LLVM Exceptions. -# See https://llvm.org/LICENSE.txt for license information. -# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -# -# (c) Copyright 2023 Xilinx Inc. - -# parameters -# -DBOOST_ROOT: Path to Boost install -# -DXRT_INC_DIR: Full path to src/runtime_src/core/include in XRT cloned repo -# -DXRT_LIB_DIR: Path to xrt_coreutil.lib - -# cmake needs this line -cmake_minimum_required(VERSION 3.1) - - -find_program(WSL NAMES powershell.exe) - -if (NOT WSL) - set(BOOST_ROOT /usr/include/boost CACHE STRING "Path to Boost install") - set(XRT_INC_DIR /opt/xilinx/xrt/include CACHE STRING "Path to XRT cloned repo") - set(XRT_LIB_DIR /opt/xilinx/xrt/lib CACHE STRING "Path to xrt_coreutil.lib") -else() - set(BOOST_ROOT C:/Technical/thirdParty/boost_1_83_0 CACHE STRING "Path to Boost install") - set(XRT_INC_DIR C:/Technical/XRT/src/runtime_src/core/include CACHE STRING "Path to XRT cloned repo") - set(XRT_LIB_DIR C:/Technical/xrtNPUfromDLL CACHE STRING "Path to xrt_coreutil.lib") -endif() - -set(TARGET_NAME test CACHE STRING "Target to be built") - -SET (ProjectName ${TARGET_NAME}) -SET (currentTarget ${TARGET_NAME}) - -if ( WSL ) - set(CMAKE_RUNTIME_OUTPUT_DIRECTORY_RELEASE ${CMAKE_BINARY_DIR}) -endif () - -project(${ProjectName}) - -# Find packages -find_package(Boost REQUIRED) - -add_executable(${currentTarget} - ${CMAKE_CURRENT_SOURCE_DIR}/../../../runtime_lib/test_lib/test_utils.cpp - test.cpp -) - -target_compile_definitions(${currentTarget} PUBLIC DISABLE_ABI_CHECK=1) - -target_include_directories (${currentTarget} PUBLIC - ../../utils - ${CMAKE_CURRENT_SOURCE_DIR}/../../../runtime_lib/test_lib - ${XRT_INC_DIR} - ${Boost_INCLUDE_DIRS} -) - -target_link_directories(${currentTarget} PUBLIC - ${XRT_LIB_DIR} - ${Boost_LIBRARY_DIRS} -) - -if (NOT WSL) - target_link_libraries(${currentTarget} PUBLIC - xrt_coreutil - boost_program_options - boost_filesystem - ) -else() - target_link_libraries(${currentTarget} PUBLIC - xrt_coreutil - ) -endif() diff --git a/test/npu-xrt/add_one_objFifo/Makefile b/test/npu-xrt/add_one_objFifo/Makefile deleted file mode 100644 index ce9d9338b3..0000000000 --- a/test/npu-xrt/add_one_objFifo/Makefile +++ /dev/null @@ -1,27 +0,0 @@ -include ../makefile-common - -targetname = addOneObjfifo - -all: build/final.xclbin build/insts.txt - -build/final.xclbin: aie.mlir - mkdir -p ${@D} - cd ${@D} && aiecc.py --aie-generate-cdo --no-compile-host --xclbin-name=${@F} \ - --aie-generate-npu --npu-insts-name=insts.txt $(<:%=../%) - -${targetname}.exe: test.cpp - rm -rf _build - mkdir -p _build - cd _build && ${powershell} cmake .. -DTARGET_NAME=${targetname} - cd _build && ${powershell} cmake --build . --config Release -ifeq "${powershell}" "powershell.exe" - cp _build/${targetname}.exe $@ -else - cp _build/${targetname} $@ -endif - -run: ${targetname}.exe build/final.xclbin build/insts.txt - ${powershell} ./$< -x build/final.xclbin -i build/insts.txt -k MLIR_AIE - -clean: - rm -rf build _build ${targetname}.exe diff --git a/test/npu-xrt/add_one_objFifo/run.lit b/test/npu-xrt/add_one_objFifo/run.lit index a137e2e4ae..ce67813ac0 100644 --- a/test/npu-xrt/add_one_objFifo/run.lit +++ b/test/npu-xrt/add_one_objFifo/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_one_objFifo/run.sh b/test/npu-xrt/add_one_objFifo/run.sh deleted file mode 100644 index 5f45b969cb..0000000000 --- a/test/npu-xrt/add_one_objFifo/run.sh +++ /dev/null @@ -1 +0,0 @@ -./test.exe -x final.xclbin -k MLIR_AIE -i insts.txt diff --git a/test/npu-xrt/add_one_objFifo/test.cpp b/test/npu-xrt/add_one_objFifo/test.cpp index 4163cdb542..d350a0d7ec 100644 --- a/test/npu-xrt/add_one_objFifo/test.cpp +++ b/test/npu-xrt/add_one_objFifo/test.cpp @@ -20,39 +20,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -82,11 +56,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/add_one_two/run.lit b/test/npu-xrt/add_one_two/run.lit index 60fb9dbf43..be9688a8f7 100644 --- a/test/npu-xrt/add_one_two/run.lit +++ b/test/npu-xrt/add_one_two/run.lit @@ -5,7 +5,7 @@ // // RUN: %python aiecc.py --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.txt %S/aie1.mlir // RUN: %python aiecc.py --xclbin-kernel-name=ADDTWO --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.txt %S/aie2.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x add_two.xclbin -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_one_two/test.cpp b/test/npu-xrt/add_one_two/test.cpp index 6a55930539..4535d0fa1c 100644 --- a/test/npu-xrt/add_one_two/test.cpp +++ b/test/npu-xrt/add_one_two/test.cpp @@ -20,39 +20,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -80,11 +54,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/add_one_two_txn/run.lit b/test/npu-xrt/add_one_two_txn/run.lit index 295fca13af..56c2f913de 100644 --- a/test/npu-xrt/add_one_two_txn/run.lit +++ b/test/npu-xrt/add_one_two_txn/run.lit @@ -3,7 +3,7 @@ // // REQUIRES: ryzen_ai // -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %python aiecc.py --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=add_one_insts.txt %S/aie1.mlir // RUN: %python aiecc.py --no-aiesim --aie-generate-txn --aie-generate-npu --no-compile-host --npu-insts-name=add_two_insts.txt %S/aie2.mlir // RUN: aie-translate -aie-npu-instgen -aie-output-binary=true -aie-sequence-name=configure aie2.mlir.prj/txn.mlir -o add_two_cfg.bin diff --git a/test/npu-xrt/add_one_two_txn/test.cpp b/test/npu-xrt/add_one_two_txn/test.cpp index f014cebc7f..14c02b6e86 100644 --- a/test/npu-xrt/add_one_two_txn/test.cpp +++ b/test/npu-xrt/add_one_two_txn/test.cpp @@ -21,51 +21,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - -std::vector load_instr_binary(std::string instr_path) { - std::ifstream instr_file(instr_path); - // read size of file, reserve space in instr_v, then read the file into - // instr_v - instr_file.seekg(0, instr_file.end); - int size = instr_file.tellg(); - instr_file.seekg(0, instr_file.beg); - std::vector instr_v(size / 4); - instr_file.read(reinterpret_cast(instr_v.data()), size); - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -97,13 +59,13 @@ int main(int argc, const char *argv[]) { } std::vector instr_0_v = - load_instr_sequence(vm["instr0"].as()); + test_utils::load_instr_sequence(vm["instr0"].as()); std::vector instr_1_v = - load_instr_sequence(vm["instr1"].as()); + test_utils::load_instr_sequence(vm["instr1"].as()); std::vector cfg_1_v = - load_instr_binary(vm["cfg"].as()); + test_utils::load_instr_binary(vm["cfg"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) { diff --git a/test/npu-xrt/add_one_using_dma/run.lit b/test/npu-xrt/add_one_using_dma/run.lit index 35aa0b374d..0d76390b3b 100644 --- a/test/npu-xrt/add_one_using_dma/run.lit +++ b/test/npu-xrt/add_one_using_dma/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --basic-alloc-scheme --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/add_one_using_dma/test.cpp b/test/npu-xrt/add_one_using_dma/test.cpp index 4163cdb542..d350a0d7ec 100644 --- a/test/npu-xrt/add_one_using_dma/test.cpp +++ b/test/npu-xrt/add_one_using_dma/test.cpp @@ -20,39 +20,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -82,11 +56,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/cascade_flows/CMakeLists.txt b/test/npu-xrt/cascade_flows/CMakeLists.txt deleted file mode 100644 index 6b330f21c1..0000000000 --- a/test/npu-xrt/cascade_flows/CMakeLists.txt +++ /dev/null @@ -1,70 +0,0 @@ -# This file is licensed under the Apache License v2.0 with LLVM Exceptions. -# See https://llvm.org/LICENSE.txt for license information. -# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -# -# (c) Copyright 2024 Advanced Micro Devices, Inc. - -# parameters -# -DBOOST_ROOT: Path to Boost install -# -DXRT_INC_DIR: Full path to src/runtime_src/core/include in XRT cloned repo -# -DXRT_LIB_DIR: Path to xrt_coreutil.lib -# -DTARGET_NAME: Target name to be built - -# cmake needs this line -cmake_minimum_required(VERSION 3.1) - -find_program(WSL NAMES powershell.exe) - -if (NOT WSL) - set(BOOST_ROOT /usr/include/boost CACHE STRING "Path to Boost install") - set(XRT_INC_DIR /opt/xilinx/xrt/include CACHE STRING "Path to XRT cloned repo") - set(XRT_LIB_DIR /opt/xilinx/xrt/lib CACHE STRING "Path to xrt_coreutil.lib") -else() - set(BOOST_ROOT C:/Technical/thirdParty/boost_1_83_0 CACHE STRING "Path to Boost install") - set(XRT_INC_DIR C:/Technical/XRT/src/runtime_src/core/include CACHE STRING "Path to XRT cloned repo") - set(XRT_LIB_DIR C:/Technical/xrtNPUfromDLL CACHE STRING "Path to xrt_coreutil.lib") -endif() - -set(TARGET_NAME test CACHE STRING "Target to be built") - -SET (ProjectName ${TARGET_NAME}) -SET (currentTarget ${TARGET_NAME}) - -if ( WSL ) - set(CMAKE_RUNTIME_OUTPUT_DIRECTORY_RELEASE ${CMAKE_BINARY_DIR}) -endif () - -project(${ProjectName}) - -# Find packages -find_package(Boost REQUIRED) - -add_executable(${currentTarget} - ${CMAKE_CURRENT_SOURCE_DIR}/../../runtime_lib/test_lib/test_utils.cpp - test.cpp -) - -target_compile_definitions(${currentTarget} PUBLIC DISABLE_ABI_CHECK=1) - -target_include_directories (${currentTarget} PUBLIC - ${XRT_INC_DIR} - ${Boost_INCLUDE_DIRS} - ${CMAKE_CURRENT_SOURCE_DIR}/../../runtime_lib/test_lib -) - -target_link_directories(${currentTarget} PUBLIC - ${XRT_LIB_DIR} - ${Boost_LIBRARY_DIRS} -) - -if (NOT WSL) - target_link_libraries(${currentTarget} PUBLIC - xrt_coreutil - boost_program_options - boost_filesystem - ) -else() - target_link_libraries(${currentTarget} PUBLIC - xrt_coreutil - ) -endif() diff --git a/test/npu-xrt/cascade_flows/Makefile b/test/npu-xrt/cascade_flows/Makefile deleted file mode 100644 index 441cd06057..0000000000 --- a/test/npu-xrt/cascade_flows/Makefile +++ /dev/null @@ -1,43 +0,0 @@ -##===- Makefile -----------------------------------------------------------===## -# -# This file licensed under the Apache License v2.0 with LLVM Exceptions. -# See https://llvm.org/LICENSE.txt for license information. -# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -# -##===----------------------------------------------------------------------===## - -include ../makefile-common - -targetname = cascadeFlows - -all: build/final.xclbin build/insts.txt - -build/%.o: %.cc - mkdir -p ${@D} - cd ${@D} && xchesscc_wrapper ${CHESSCCWRAP2_FLAGS} -DBIT_WIDTH=8 -c $(<:%=../%) -o ${@F} - -build/final.xclbin: aie.mlir build/kernel1.o build/kernel2.o build/kernel3.o - mkdir -p ${@D} - cd ${@D} && aiecc.py --aie-generate-cdo --no-compile-host --xclbin-name=${@F} \ - --aie-generate-npu --npu-insts-name=insts.txt $(<:%=../%) - -${targetname}.exe: test.cpp - rm -rf _build - mkdir -p _build - cd _build && ${powershell} cmake .. -DTARGET_NAME=${targetname} - cd _build && ${powershell} cmake --build . --config Release -ifeq "${powershell}" "powershell.exe" - cp _build/${targetname}.exe $@ -else - cp _build/${targetname} $@ -endif - -run: ${targetname}.exe build/final.xclbin build/insts.txt - ${powershell} ./$< -x build/final.xclbin -i build/insts.txt -k MLIR_AIE - -run_py: build/final.xclbin build/insts.txt - ${powershell} python3 test.py -x build/final.xclbin -i build/insts.txt -k MLIR_AIE - -clean: - rm -rf build _build ${targetname}.exe - diff --git a/test/npu-xrt/cascade_flows/run.lit b/test/npu-xrt/cascade_flows/run.lit index c3b2945605..51d9808bb4 100644 --- a/test/npu-xrt/cascade_flows/run.lit +++ b/test/npu-xrt/cascade_flows/run.lit @@ -7,6 +7,6 @@ // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel2.cc -o ./kernel2.o // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel3.cc -o ./kernel3.o // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/cascade_flows/test.cpp b/test/npu-xrt/cascade_flows/test.cpp index 2a3affc09c..2216fe81ef 100644 --- a/test/npu-xrt/cascade_flows/test.cpp +++ b/test/npu-xrt/cascade_flows/test.cpp @@ -20,39 +20,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64; constexpr int OUT_SIZE = 64; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -82,11 +56,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/ctrl_packet_reconfig/run.lit b/test/npu-xrt/ctrl_packet_reconfig/run.lit index 7e43d4efbb..1677b2539a 100644 --- a/test/npu-xrt/ctrl_packet_reconfig/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig/run.lit @@ -14,6 +14,6 @@ // RUN: aie-opt -aie-ctrl-packet-to-dma -aie-dma-to-npu aie2_overlay.mlir.prj/ctrlpkt.mlir -o ctrlpkt_dma_seq.mlir // RUN: aie-translate -aie-npu-instgen -aie-sequence-name=configure ctrlpkt_dma_seq.mlir -o ctrlpkt_dma_seq.txt // -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/ctrl_packet_reconfig/test.cpp b/test/npu-xrt/ctrl_packet_reconfig/test.cpp index 0ea1283140..6ea90ce312 100644 --- a/test/npu-xrt/ctrl_packet_reconfig/test.cpp +++ b/test/npu-xrt/ctrl_packet_reconfig/test.cpp @@ -21,35 +21,24 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64 * 64; constexpr int OUT_SIZE = 64 * 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // AIE design's data streams - std::vector instr2_v = load_instr_sequence("aie2_run_seq.txt"); + std::vector instr2_v = + test_utils::load_instr_sequence("aie2_run_seq.txt"); // AIE configuration as control packet streams std::vector instr3_cfg_v = - load_instr_sequence("ctrlpkt_dma_seq.txt"); + test_utils::load_instr_sequence("ctrlpkt_dma_seq.txt"); // AIE configuration control packets' raw data - std::vector ctrlPackets = load_instr_sequence("ctrlpkt.txt"); + std::vector ctrlPackets = + test_utils::load_instr_sequence("ctrlpkt.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit index 7e43d4efbb..1677b2539a 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit @@ -14,6 +14,6 @@ // RUN: aie-opt -aie-ctrl-packet-to-dma -aie-dma-to-npu aie2_overlay.mlir.prj/ctrlpkt.mlir -o ctrlpkt_dma_seq.mlir // RUN: aie-translate -aie-npu-instgen -aie-sequence-name=configure ctrlpkt_dma_seq.mlir -o ctrlpkt_dma_seq.txt // -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/test.cpp b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/test.cpp index 4bbb4693b9..7cc4e9ff21 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/test.cpp +++ b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/test.cpp @@ -21,32 +21,21 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 4 * 64 * 64; constexpr int OUT_SIZE = 4 * 64 * 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("aie_run_seq.txt"); + std::vector instr_v = + test_utils::load_instr_sequence("aie_run_seq.txt"); std::vector ctrlpkt_instr_v = load_instr_sequence("ctrlpkt_dma_seq.txt"); - std::vector ctrlPackets = load_instr_sequence("ctrlpkt.txt"); + std::vector ctrlPackets = + test_utils::load_instr_sequence("ctrlpkt.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit index 7e43d4efbb..1677b2539a 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit @@ -14,6 +14,6 @@ // RUN: aie-opt -aie-ctrl-packet-to-dma -aie-dma-to-npu aie2_overlay.mlir.prj/ctrlpkt.mlir -o ctrlpkt_dma_seq.mlir // RUN: aie-translate -aie-npu-instgen -aie-sequence-name=configure ctrlpkt_dma_seq.mlir -o ctrlpkt_dma_seq.txt // -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/test.cpp b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/test.cpp index 4bbb4693b9..91a041a02a 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/test.cpp +++ b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/test.cpp @@ -21,32 +21,21 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 4 * 64 * 64; constexpr int OUT_SIZE = 4 * 64 * 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("aie_run_seq.txt"); + std::vector instr_v = + test_utils::load_instr_sequence("aie_run_seq.txt"); std::vector ctrlpkt_instr_v = - load_instr_sequence("ctrlpkt_dma_seq.txt"); - std::vector ctrlPackets = load_instr_sequence("ctrlpkt.txt"); + test_utils::load_instr_sequence("ctrlpkt_dma_seq.txt"); + std::vector ctrlPackets = + test_utils::load_instr_sequence("ctrlpkt.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/matrix_multiplication_using_cascade/matrix_multiplication.h b/test/npu-xrt/matrix_multiplication_using_cascade/matrix_multiplication.h index 9dbe9bd203..320f23c4dc 100644 --- a/test/npu-xrt/matrix_multiplication_using_cascade/matrix_multiplication.h +++ b/test/npu-xrt/matrix_multiplication_using_cascade/matrix_multiplication.h @@ -77,25 +77,6 @@ void parse_options(int argc, const char *argv[], po::options_description &desc, check_arg_file_exists(vm, "instr"); } -// -------------------------------------------------------------------------- -// AIE Specifics -// -------------------------------------------------------------------------- - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - // -------------------------------------------------------------------------- // Matrix / Float / Math // -------------------------------------------------------------------------- diff --git a/test/npu-xrt/matrix_multiplication_using_cascade/run.lit b/test/npu-xrt/matrix_multiplication_using_cascade/run.lit index 03d7c862c5..da0f12b328 100644 --- a/test/npu-xrt/matrix_multiplication_using_cascade/run.lit +++ b/test/npu-xrt/matrix_multiplication_using_cascade/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai, chess // // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/mm.cc -o ./mm.o -// RUN: g++-13 %S/test.cpp -o test.exe -std=c++23 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: g++-13 %S/test.cpp -o test.exe -std=c++23 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // // RUN: %python aiecc.py --xchesscc --xbridge --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie2_plain.xclbin --npu-insts-name=insts2_plain.txt %S/aie_plainx4.mlir // RUN: %run_on_npu ./test.exe -x aie2_plain.xclbin -k MLIR_AIE -i insts2_plain.txt --trace_sz 32768 | FileCheck --check-prefix=CHECK_PLAIN %s diff --git a/test/npu-xrt/matrix_multiplication_using_cascade/test.cpp b/test/npu-xrt/matrix_multiplication_using_cascade/test.cpp index c3440ef956..bf9d1196e6 100644 --- a/test/npu-xrt/matrix_multiplication_using_cascade/test.cpp +++ b/test/npu-xrt/matrix_multiplication_using_cascade/test.cpp @@ -25,6 +25,8 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + #include "matrix_multiplication.h" constexpr int M = 16; @@ -60,7 +62,7 @@ int main(int argc, const char *argv[]) { srand(time(NULL)); std::vector instr_v = - matmul_common::load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); if (verbosity >= 1) std::cout << "Sequence instr count: " << instr_v.size() << "\n"; diff --git a/test/npu-xrt/matrix_transpose/aie2.py b/test/npu-xrt/matrix_transpose/aie2.py index c61170af95..112762f3d0 100644 --- a/test/npu-xrt/matrix_transpose/aie2.py +++ b/test/npu-xrt/matrix_transpose/aie2.py @@ -10,7 +10,7 @@ # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.txt ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++17 -Wall %xrt_flags -lrt -lstdc++ +# RUN: clang %S/test.cpp -o test -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags # RUN: %run_on_npu ./test | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/matrix_transpose/test.cpp b/test/npu-xrt/matrix_transpose/test.cpp index ac6b40e00f..1a32d42643 100644 --- a/test/npu-xrt/matrix_transpose/test.cpp +++ b/test/npu-xrt/matrix_transpose/test.cpp @@ -13,6 +13,8 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + #ifndef XCLBIN #define XCLBIN "final.xclbin" #endif @@ -30,21 +32,6 @@ #define SIZE (MATRIX_ROWS * MATRIX_COLS * sizeof(int32_t)) // in bytes -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - void print_matrix(int32_t *buf, int n_rows, int n_cols) { for (int row = 0; row < n_rows; row++) { for (int col = 0; col < n_cols; col++) { @@ -56,7 +43,7 @@ void print_matrix(int32_t *buf, int n_rows, int n_cols) { int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence(INSTS_TXT); + std::vector instr_v = test_utils::load_instr_sequence(INSTS_TXT); assert(instr_v.size() > 0); // Get a device handle diff --git a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit index 5c2f46ffb9..f58b8b0b87 100644 --- a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit +++ b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai, chess // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/test.cpp b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/test.cpp index c6fc7226ca..f16582acbf 100644 --- a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/test.cpp +++ b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/test.cpp @@ -21,35 +21,9 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" -namespace po = boost::program_options; - -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} +#include "test_utils.h" -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} +namespace po = boost::program_options; int main(int argc, const char *argv[]) { // Program arguments parsing @@ -81,11 +55,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/memtile_dmas/writebd/run.lit b/test/npu-xrt/memtile_dmas/writebd/run.lit index 5c2f46ffb9..f58b8b0b87 100644 --- a/test/npu-xrt/memtile_dmas/writebd/run.lit +++ b/test/npu-xrt/memtile_dmas/writebd/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai, chess // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/memtile_dmas/writebd/test.cpp b/test/npu-xrt/memtile_dmas/writebd/test.cpp index c6fc7226ca..f16582acbf 100644 --- a/test/npu-xrt/memtile_dmas/writebd/test.cpp +++ b/test/npu-xrt/memtile_dmas/writebd/test.cpp @@ -21,35 +21,9 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" -namespace po = boost::program_options; - -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} +#include "test_utils.h" -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} +namespace po = boost::program_options; int main(int argc, const char *argv[]) { // Program arguments parsing @@ -81,11 +55,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit b/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit index 289a70896d..d5b8d9f65a 100644 --- a/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit +++ b/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai, chess // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! \ No newline at end of file diff --git a/test/npu-xrt/memtile_dmas/writebd_tokens/test.cpp b/test/npu-xrt/memtile_dmas/writebd_tokens/test.cpp index 4ce617012a..07feef6a75 100644 --- a/test/npu-xrt/memtile_dmas/writebd_tokens/test.cpp +++ b/test/npu-xrt/memtile_dmas/writebd_tokens/test.cpp @@ -21,35 +21,9 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" -namespace po = boost::program_options; +#include "test_utils.h" -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} +namespace po = boost::program_options; int main(int argc, const char *argv[]) { // Program arguments parsing @@ -81,11 +55,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/nd_memcpy_transforms/aie2.py b/test/npu-xrt/nd_memcpy_transforms/aie2.py index 8569a84fe4..3ae680f7d0 100644 --- a/test/npu-xrt/nd_memcpy_transforms/aie2.py +++ b/test/npu-xrt/nd_memcpy_transforms/aie2.py @@ -10,7 +10,7 @@ # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.txt ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +# RUN: clang %S/test.cpp -o test -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags # RUN: %run_on_npu ./test | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/nd_memcpy_transforms/test.cpp b/test/npu-xrt/nd_memcpy_transforms/test.cpp index 646496e08a..c6387bbd04 100644 --- a/test/npu-xrt/nd_memcpy_transforms/test.cpp +++ b/test/npu-xrt/nd_memcpy_transforms/test.cpp @@ -13,24 +13,7 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" -// -------------------------------------------------------------------------- -// AIE Specifics -// -------------------------------------------------------------------------- - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} +#include "test_utils.h" #ifndef XCLBIN #define XCLBIN "final.xclbin" @@ -60,7 +43,7 @@ std::vector load_instr_sequence(std::string instr_path) { int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence(INSTS_TXT); + std::vector instr_v = test_utils::load_instr_sequence(INSTS_TXT); assert(instr_v.size() > 0); // Get a device handle diff --git a/test/npu-xrt/packet_flow/run.lit b/test/npu-xrt/packet_flow/run.lit index e2ce0e4340..fee2934fc1 100644 --- a/test/npu-xrt/packet_flow/run.lit +++ b/test/npu-xrt/packet_flow/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/packet_flow/test.cpp b/test/npu-xrt/packet_flow/test.cpp index a15dc5e607..3261813d54 100644 --- a/test/npu-xrt/packet_flow/test.cpp +++ b/test/npu-xrt/packet_flow/test.cpp @@ -19,29 +19,16 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 64 * 64; constexpr int OUT_SIZE = 64 * 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/packet_flow_fanin/run.lit b/test/npu-xrt/packet_flow_fanin/run.lit index e2ce0e4340..fee2934fc1 100644 --- a/test/npu-xrt/packet_flow_fanin/run.lit +++ b/test/npu-xrt/packet_flow_fanin/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/packet_flow_fanin/test.cpp b/test/npu-xrt/packet_flow_fanin/test.cpp index 512c3a4b74..8ba572d067 100644 --- a/test/npu-xrt/packet_flow_fanin/test.cpp +++ b/test/npu-xrt/packet_flow_fanin/test.cpp @@ -19,29 +19,16 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 128 * 64; constexpr int OUT_SIZE = 128 * 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/packet_flow_fanout/run.lit b/test/npu-xrt/packet_flow_fanout/run.lit index e2ce0e4340..fee2934fc1 100644 --- a/test/npu-xrt/packet_flow_fanout/run.lit +++ b/test/npu-xrt/packet_flow_fanout/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai // // RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/packet_flow_fanout/test.cpp b/test/npu-xrt/packet_flow_fanout/test.cpp index 512c3a4b74..8ba572d067 100644 --- a/test/npu-xrt/packet_flow_fanout/test.cpp +++ b/test/npu-xrt/packet_flow_fanout/test.cpp @@ -19,29 +19,16 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 128 * 64; constexpr int OUT_SIZE = 128 * 64; #define IN_DATATYPE int8_t #define OUT_DATATYPE int8_t -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence("insts.txt"); + std::vector instr_v = test_utils::load_instr_sequence("insts.txt"); // Start the XRT test code // Get a device handle diff --git a/test/npu-xrt/sync_task_complete_token/aie2.py b/test/npu-xrt/sync_task_complete_token/aie2.py index 333fdbb668..2acdacf421 100644 --- a/test/npu-xrt/sync_task_complete_token/aie2.py +++ b/test/npu-xrt/sync_task_complete_token/aie2.py @@ -9,7 +9,7 @@ # # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.txt ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +# RUN: clang %S/test.cpp -o test -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags # RUN: %run_on_npu ./test | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/sync_task_complete_token/test.cpp b/test/npu-xrt/sync_task_complete_token/test.cpp index d2906461ec..4330f50cb1 100644 --- a/test/npu-xrt/sync_task_complete_token/test.cpp +++ b/test/npu-xrt/sync_task_complete_token/test.cpp @@ -13,20 +13,7 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} +#include "test_utils.h" #ifndef XCLBIN #define XCLBIN "final.xclbin" @@ -47,7 +34,7 @@ std::vector load_instr_sequence(std::string instr_path) { int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence(INSTS_TXT); + std::vector instr_v = test_utils::load_instr_sequence(INSTS_TXT); assert(instr_v.size() > 0); // Get a device handle diff --git a/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py b/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py index 3cdce92088..5a19f040d6 100644 --- a/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py +++ b/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py @@ -9,7 +9,7 @@ # # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.txt ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++11 -Wall %xrt_flags -lrt -lstdc++ +# RUN: clang %S/test.cpp -o test -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags # RUN: %run_on_npu ./test | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/sync_task_complete_token_bd_chaining/test.cpp b/test/npu-xrt/sync_task_complete_token_bd_chaining/test.cpp index d2906461ec..4330f50cb1 100644 --- a/test/npu-xrt/sync_task_complete_token_bd_chaining/test.cpp +++ b/test/npu-xrt/sync_task_complete_token_bd_chaining/test.cpp @@ -13,20 +13,7 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} +#include "test_utils.h" #ifndef XCLBIN #define XCLBIN "final.xclbin" @@ -47,7 +34,7 @@ std::vector load_instr_sequence(std::string instr_path) { int main(int argc, const char *argv[]) { - std::vector instr_v = load_instr_sequence(INSTS_TXT); + std::vector instr_v = test_utils::load_instr_sequence(INSTS_TXT); assert(instr_v.size() > 0); // Get a device handle diff --git a/test/npu-xrt/two_col/run.lit b/test/npu-xrt/two_col/run.lit index 5b2b54b291..b665fea216 100644 --- a/test/npu-xrt/two_col/run.lit +++ b/test/npu-xrt/two_col/run.lit @@ -5,6 +5,6 @@ // // RUN: xchesscc_wrapper aie2 -I %aietools/include -DBIT_WIDTH=8 -c %S/threshold.cc -o ./threshold.o // RUN: %python aiecc.py --xchesscc --xbridge --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/two_col/test.cpp b/test/npu-xrt/two_col/test.cpp index 5563c860f1..77b2bb6318 100644 --- a/test/npu-xrt/two_col/test.cpp +++ b/test/npu-xrt/two_col/test.cpp @@ -11,8 +11,7 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" -// #define IMAGE_WIDTH_IN 256 -// #define IMAGE_HEIGHT_IN 256 +#include "test_utils.h" #define IMAGE_WIDTH_IN 128 #define IMAGE_HEIGHT_IN 64 @@ -28,34 +27,6 @@ constexpr int OUT_SIZE = (IMAGE_AREA_OUT * sizeof(uint8_t)); namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -85,11 +56,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/npu-xrt/vector_scalar_using_dma/run.lit b/test/npu-xrt/vector_scalar_using_dma/run.lit index 494056eba0..1f3e655762 100644 --- a/test/npu-xrt/vector_scalar_using_dma/run.lit +++ b/test/npu-xrt/vector_scalar_using_dma/run.lit @@ -5,6 +5,6 @@ // // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/scale.cc -o ./scale.o // RUN: %python aiecc.py --xbridge --aie-generate-cdo --aie-generate-npu --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.txt %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem +// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags // RUN: %run_on_npu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s // CHECK: PASS! diff --git a/test/npu-xrt/vector_scalar_using_dma/test.cpp b/test/npu-xrt/vector_scalar_using_dma/test.cpp index 598d87ca69..12ce56f72f 100644 --- a/test/npu-xrt/vector_scalar_using_dma/test.cpp +++ b/test/npu-xrt/vector_scalar_using_dma/test.cpp @@ -21,39 +21,13 @@ #include "xrt/xrt_device.h" #include "xrt/xrt_kernel.h" +#include "test_utils.h" + constexpr int IN_SIZE = 4096; constexpr int OUT_SIZE = 4096; namespace po = boost::program_options; -void check_arg_file_exists(po::variables_map &vm_in, std::string name) { - if (!vm_in.count(name)) { - throw std::runtime_error("Error: no " + name + " file was provided\n"); - } else { - std::ifstream test(vm_in[name].as()); - if (!test) { - throw std::runtime_error("The " + name + " file " + - vm_in[name].as() + - " does not exist.\n"); - } - } -} - -std::vector load_instr_sequence(std::string instr_path) { - std::ifstream instr_file(instr_path); - std::string line; - std::vector instr_v; - while (std::getline(instr_file, line)) { - std::istringstream iss(line); - uint32_t a; - if (!(iss >> std::hex >> a)) { - throw std::runtime_error("Unable to parse instruction file\n"); - } - instr_v.push_back(a); - } - return instr_v; -} - int main(int argc, const char *argv[]) { // Program arguments parsing @@ -83,11 +57,11 @@ int main(int argc, const char *argv[]) { return 1; } - check_arg_file_exists(vm, "xclbin"); - check_arg_file_exists(vm, "instr"); + test_utils::check_arg_file_exists(vm, "xclbin"); + test_utils::check_arg_file_exists(vm, "instr"); std::vector instr_v = - load_instr_sequence(vm["instr"].as()); + test_utils::load_instr_sequence(vm["instr"].as()); int verbosity = vm["verbosity"].as(); if (verbosity >= 1) diff --git a/test/objectFifo_tests/broadcast/aie.mlir b/test/objectFifo_tests/broadcast/aie.mlir index 84058c1fb3..c9d0299235 100755 --- a/test/objectFifo_tests/broadcast/aie.mlir +++ b/test/objectFifo_tests/broadcast/aie.mlir @@ -11,7 +11,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // This test establishes a broadcast through an object FIFO with producer tile (1, 3) and diff --git a/test/objectFifo_tests/ping_pong/aie.mlir b/test/objectFifo_tests/ping_pong/aie.mlir index 8602c8c89e..a24f105269 100755 --- a/test/objectFifo_tests/ping_pong/aie.mlir +++ b/test/objectFifo_tests/ping_pong/aie.mlir @@ -10,7 +10,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // This test uses a special case of the objectFifo, an objectFifo with two elements. diff --git a/test/objectFifo_tests/tileDMA_channels/aie.mlir b/test/objectFifo_tests/tileDMA_channels/aie.mlir index 4003e0b2ba..6fe2d0e628 100755 --- a/test/objectFifo_tests/tileDMA_channels/aie.mlir +++ b/test/objectFifo_tests/tileDMA_channels/aie.mlir @@ -11,7 +11,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // This test uses all four channels of the tileDMAs of tiles (1, 2) and (3, 3) as four object FIFOs. diff --git a/test/objectFifo_tests/twoFilter2D/aie.mlir b/test/objectFifo_tests/twoFilter2D/aie.mlir index 56002d2f7d..858d7a0f76 100755 --- a/test/objectFifo_tests/twoFilter2D/aie.mlir +++ b/test/objectFifo_tests/twoFilter2D/aie.mlir @@ -10,7 +10,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // In this test, two objectFifos are created between three tiles; tile (1, 3) is both a diff --git a/test/unit_tests/aie/01_memory_read_write/aie.mlir b/test/unit_tests/aie/01_memory_read_write/aie.mlir index 2671487cec..b61ecae592 100644 --- a/test/unit_tests/aie/01_memory_read_write/aie.mlir +++ b/test/unit_tests/aie/01_memory_read_write/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test01_memory_read_write { diff --git a/test/unit_tests/aie/02_lock_acquire_release/aie.mlir b/test/unit_tests/aie/02_lock_acquire_release/aie.mlir index 41a4427141..7ebed81de5 100644 --- a/test/unit_tests/aie/02_lock_acquire_release/aie.mlir +++ b/test/unit_tests/aie/02_lock_acquire_release/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test02_lock_acquire_release { diff --git a/test/unit_tests/aie/03_sync_with_locks/aie.mlir b/test/unit_tests/aie/03_sync_with_locks/aie.mlir index 3cfedb9cdf..32f598e41f 100644 --- a/test/unit_tests/aie/03_sync_with_locks/aie.mlir +++ b/test/unit_tests/aie/03_sync_with_locks/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test03_sync_with_locks { diff --git a/test/unit_tests/aie/04_shared_memory/aie.mlir b/test/unit_tests/aie/04_shared_memory/aie.mlir index fe26aa4369..d15289f9d3 100644 --- a/test/unit_tests/aie/04_shared_memory/aie.mlir +++ b/test/unit_tests/aie/04_shared_memory/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test04_shared_memory { diff --git a/test/unit_tests/aie/05_tiledma/aie.mlir b/test/unit_tests/aie/05_tiledma/aie.mlir index c229c9f673..dff84053c1 100644 --- a/test/unit_tests/aie/05_tiledma/aie.mlir +++ b/test/unit_tests/aie/05_tiledma/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test05_tiledma { diff --git a/test/unit_tests/aie/08_stream_broadcast/aie.mlir b/test/unit_tests/aie/08_stream_broadcast/aie.mlir index ba650e48de..53fa43a310 100644 --- a/test/unit_tests/aie/08_stream_broadcast/aie.mlir +++ b/test/unit_tests/aie/08_stream_broadcast/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test08_stream_broadcast { diff --git a/test/unit_tests/aie/09_simple_shim_dma/aie.mlir b/test/unit_tests/aie/09_simple_shim_dma/aie.mlir index 65387d0159..3727c504e0 100644 --- a/test/unit_tests/aie/09_simple_shim_dma/aie.mlir +++ b/test/unit_tests/aie/09_simple_shim_dma/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test09_simple_shim_dma { diff --git a/test/unit_tests/aie/10_scalar_fp/aie.mlir b/test/unit_tests/aie/10_scalar_fp/aie.mlir index 7dd1136f2c..df9be3b7e0 100644 --- a/test/unit_tests/aie/10_scalar_fp/aie.mlir +++ b/test/unit_tests/aie/10_scalar_fp/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test { diff --git a/test/unit_tests/aie/11_vector_fp/aie.mlir b/test/unit_tests/aie/11_vector_fp/aie.mlir index bc63e8da0d..c9ed9a907a 100644 --- a/test/unit_tests/aie/11_vector_fp/aie.mlir +++ b/test/unit_tests/aie/11_vector_fp/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test { diff --git a/test/unit_tests/aie/12_julia/aie.mlir b/test/unit_tests/aie/12_julia/aie.mlir index d9d83f95f2..ab15f11819 100644 --- a/test/unit_tests/aie/12_julia/aie.mlir +++ b/test/unit_tests/aie/12_julia/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: peano && jackl // RUN: %PEANO_INSTALL_DIR/bin/clang++ --target=aie -c -I/usr/include/aie %S/kernel.cpp -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf diff --git a/test/unit_tests/aie/13_julia_fp/aie.mlir b/test/unit_tests/aie/13_julia_fp/aie.mlir index 2eeea7aa68..f1c12a9988 100644 --- a/test/unit_tests/aie/13_julia_fp/aie.mlir +++ b/test/unit_tests/aie/13_julia_fp/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: peano && jackl // RUN: %PEANO_INSTALL_DIR/bin/clang++ -O2 --target=aie -c -I/usr/include/aie %S/kernel.cpp -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test { diff --git a/test/unit_tests/aie/14_stream_packet/aie.mlir b/test/unit_tests/aie/14_stream_packet/aie.mlir index f9991bc803..4f93c58e77 100644 --- a/test/unit_tests/aie/14_stream_packet/aie.mlir +++ b/test/unit_tests/aie/14_stream_packet/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: !hsa -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test14_stream_packet { diff --git a/test/unit_tests/aie/15_prime_sieve/aie.mlir b/test/unit_tests/aie/15_prime_sieve/aie.mlir index 5b2f56edf8..831d5dc82e 100644 --- a/test/unit_tests/aie/15_prime_sieve/aie.mlir +++ b/test/unit_tests/aie/15_prime_sieve/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test15_prime_sieve { diff --git a/test/unit_tests/aie/16_libm_expf/aie.mlir b/test/unit_tests/aie/16_libm_expf/aie.mlir index 70a6f6fe75..080654a179 100644 --- a/test/unit_tests/aie/16_libm_expf/aie.mlir +++ b/test/unit_tests/aie/16_libm_expf/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: !hsa -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test { diff --git a/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir b/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir index 164339c272..d07a2e2fd7 100644 --- a/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir +++ b/test/unit_tests/aie/17_shim_dma_with_core/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // clang -O2 --target=aie -c %S/kernel.cc -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test17_shim_dma_with_core{ diff --git a/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir b/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir index f8bb745176..f997375df5 100644 --- a/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir +++ b/test/unit_tests/aie/18_simple_shim_dma_routed/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test18_simple_shim_dma_routed { diff --git a/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir b/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir index b7b3f222ce..a93af95d2f 100644 --- a/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir +++ b/test/unit_tests/aie/19_shim_dma_with_core_routed/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // clang -O2 --target=aie -c %S/kernel.cc -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test19_shim_dma_with_core_routed{ diff --git a/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir b/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir index f8aa235f94..bbccafaaa7 100644 --- a/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir +++ b/test/unit_tests/aie/20_shim_dma_broadcast/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --basic-alloc-scheme --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test20_shim_dma_broadcast { diff --git a/test/unit_tests/aie/21_shim_dma_packet/aie.mlir b/test/unit_tests/aie/21_shim_dma_packet/aie.mlir index 9d2cca8b59..9994b382ed 100644 --- a/test/unit_tests/aie/21_shim_dma_packet/aie.mlir +++ b/test/unit_tests/aie/21_shim_dma_packet/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // A single kernel 32x32x32 GEMM using GMIO. diff --git a/test/unit_tests/aie/21_target_triple/aie.mlir b/test/unit_tests/aie/21_target_triple/aie.mlir index a9e465b327..87a09a77da 100644 --- a/test/unit_tests/aie/21_target_triple/aie.mlir +++ b/test/unit_tests/aie/21_target_triple/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf // When this IR is lowered to LLVM, the affine.load operation resulting "%val0" diff --git a/test/unit_tests/aie/22_init_locks/aie.mlir b/test/unit_tests/aie/22_init_locks/aie.mlir index eed43f3669..e5a85adf29 100644 --- a/test/unit_tests/aie/22_init_locks/aie.mlir +++ b/test/unit_tests/aie/22_init_locks/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test22_init_locks { diff --git a/test/unit_tests/aie/23_broadcast_packet/aie.mlir b/test/unit_tests/aie/23_broadcast_packet/aie.mlir index 252f388825..9c801fa629 100644 --- a/test/unit_tests/aie/23_broadcast_packet/aie.mlir +++ b/test/unit_tests/aie/23_broadcast_packet/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf module @test23_broadcast_packet { diff --git a/test/unit_tests/aie/23_packet_biShim/aie.mlir b/test/unit_tests/aie/23_packet_biShim/aie.mlir index 0a50916a81..4f33ce50ed 100644 --- a/test/unit_tests/aie/23_packet_biShim/aie.mlir +++ b/test/unit_tests/aie/23_packet_biShim/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf module @aie_module { %t70 = aie.tile(7, 0) diff --git a/test/unit_tests/aie/24_host_loop/aie.mlir b/test/unit_tests/aie/24_host_loop/aie.mlir index 886a0a9206..989ff19cc6 100755 --- a/test/unit_tests/aie/24_host_loop/aie.mlir +++ b/test/unit_tests/aie/24_host_loop/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf aie.device(xcvc1902) { diff --git a/test/unit_tests/aie/25_host_multirate/aie.mlir b/test/unit_tests/aie/25_host_multirate/aie.mlir index 1133a973b4..1405debda0 100755 --- a/test/unit_tests/aie/25_host_multirate/aie.mlir +++ b/test/unit_tests/aie/25_host_multirate/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf aie.device(xcvc1902) { diff --git a/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir b/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir index 4e7a49f2fe..36bb86411a 100644 --- a/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir +++ b/test/unit_tests/aie/27_single_L1_single_lock/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @test27_simple_shim_dma_single_lock { diff --git a/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir b/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir index f583981529..38fbd8e4d4 100644 --- a/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir +++ b/test/unit_tests/aie/27_single_L1_single_lock/aie2.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: hsa -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // XFAIL: * diff --git a/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir b/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir index 32f092c9da..6a6ca44e6c 100644 --- a/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir +++ b/test/unit_tests/aie/27_single_L1_single_lock/aieWithWorkaround.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: !hsa -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @test27_simple_shim_dma_single_lock { diff --git a/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir b/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir index 2a96879378..d3c824de6c 100755 --- a/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir +++ b/test/unit_tests/aie/28_multidepth_objectFifos/multi_depth/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @multi_depth { diff --git a/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir b/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir index 82acab53e5..e69d819f6e 100755 --- a/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir +++ b/test/unit_tests/aie/28_multidepth_objectFifos/single_depth/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py -j4 %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf module @single_depth { diff --git a/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir b/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir index 5b702e3969..b6d0179497 100644 --- a/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir +++ b/test/unit_tests/aie/29_aie2_nd_dma_even_odd/aie.mlir @@ -24,7 +24,7 @@ // checked from the host code to be correct. // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf // RUN: sh -c 'aie.mlir.prj/aiesim.sh; exit 0' | FileCheck %s diff --git a/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir b/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir index bf7459a076..8d62a5d587 100644 --- a/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir +++ b/test/unit_tests/aie/30_aie2_nd_dma_transpose_repeat/aie.mlir @@ -12,7 +12,7 @@ // buffer descriptors. // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_vck5000 ./test.elf // RUN: sh -c 'aie.mlir.prj/aiesim.sh; exit 0' | FileCheck %s diff --git a/test/unit_tests/aie/31_stream_core/aie.mlir b/test/unit_tests/aie/31_stream_core/aie.mlir index 2565b350be..99262c6549 100644 --- a/test/unit_tests/aie/31_stream_core/aie.mlir +++ b/test/unit_tests/aie/31_stream_core/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: peano, !hsa -// RUN: %PYTHON aiecc.py --aiesim --no-xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --no-xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: sh -c 'aie.mlir.prj/aiesim.sh; exit 0' | FileCheck %s @@ -19,7 +19,7 @@ module { %tile13 = aie.tile(1, 3) - %tile23 = aie.tile(2, 3) + %tile23 = aie.tile(2, 3)1 %buf13 = aie.buffer(%tile13) { sym_name = "a" } : memref<256xi32> %buf23 = aie.buffer(%tile23) { sym_name = "c" } : memref<256xi32> diff --git a/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir b/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir index 9842a52ce8..442a6fcf95 100644 --- a/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir +++ b/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: peano // RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // CHECK: PASS! diff --git a/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir b/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir index 199f9fd754..3e419ef339 100644 --- a/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir +++ b/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: peano // RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // CHECK: PASS! diff --git a/test/unit_tests/aie2/03_simple/aie.mlir b/test/unit_tests/aie2/03_simple/aie.mlir index 22fc1351cf..e310f48b4e 100644 --- a/test/unit_tests/aie2/03_simple/aie.mlir +++ b/test/unit_tests/aie2/03_simple/aie.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // CHECK: PASS! diff --git a/test/unit_tests/aie2/04_shared_memory/aie.mlir b/test/unit_tests/aie2/04_shared_memory/aie.mlir index dc48cc6f59..8edf4b7bd8 100644 --- a/test/unit_tests/aie2/04_shared_memory/aie.mlir +++ b/test/unit_tests/aie2/04_shared_memory/aie.mlir @@ -9,7 +9,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf diff --git a/test/unit_tests/aie2/04_shared_memory/aie_row.mlir b/test/unit_tests/aie2/04_shared_memory/aie_row.mlir index d084ac66ef..4fa6eed4ee 100644 --- a/test/unit_tests/aie2/04_shared_memory/aie_row.mlir +++ b/test/unit_tests/aie2/04_shared_memory/aie_row.mlir @@ -9,7 +9,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // CHECK: AIE2 ISS diff --git a/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir b/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir index 0666c5bb3a..f61b0169e6 100644 --- a/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir +++ b/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir @@ -11,7 +11,7 @@ // REQUIRES: peano // RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // CHECK: AIE2 ISS diff --git a/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir b/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir index c741035fd1..d3593dda7e 100644 --- a/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir +++ b/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: peano // RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf module @test_chess_04_deprecated_shim_dma_precompiled_kernel{ diff --git a/test/unit_tests/aie2/08_tile_locks/aie.mlir b/test/unit_tests/aie2/08_tile_locks/aie.mlir index 4dc41e0918..1582508e70 100644 --- a/test/unit_tests/aie2/08_tile_locks/aie.mlir +++ b/test/unit_tests/aie2/08_tile_locks/aie.mlir @@ -9,7 +9,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // CHECK: AIE2 ISS diff --git a/test/unit_tests/aie2/09_memtile_locks/aie.mlir b/test/unit_tests/aie2/09_memtile_locks/aie.mlir index d09d26a6db..3c276d2d43 100644 --- a/test/unit_tests/aie2/09_memtile_locks/aie.mlir +++ b/test/unit_tests/aie2/09_memtile_locks/aie.mlir @@ -9,7 +9,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // CHECK: AIE2 ISS diff --git a/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir index 6aa0dea828..df2bbf9665 100644 --- a/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/01_precompiled_core_function/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: valid_xchess_license, !hsa // RUN: xchesscc_wrapper aie -c %S/kernel.cc -// RUN: %PYTHON aiecc.py --aiesim --xbridge --xchesscc %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xbridge --xchesscc %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir index 8d9e593936..1f3b24a88f 100644 --- a/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/02_precompiled_kernel/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: xchesscc_wrapper aie +l aie.mlir.prj/core_1_3.bcf %S/kernel.cc -o custom_1_3.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir b/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir index f7058f1c9d..db990c77a3 100644 --- a/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/03_cascade_core_functions/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: valid_xchess_license, !hsa // RUN: xchesscc_wrapper aie -c %S/kernel.cc -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir index 818abbd5e9..7a5986fee5 100644 --- a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir index 0bce0bdb92..479d9dc6a3 100644 --- a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir +++ b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie_row.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir index e91eac6dd6..f04c742cb3 100644 --- a/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/04_shim_dma_kernel/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: xchesscc_wrapper aie +l aie.mlir.prj/core_7_3.bcf %S/kernel.cc -o custom_7_3.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir index 6a97ff3db9..ea72e59a24 100644 --- a/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/05_shim_dma_core_function/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: valid_xchess_license, !hsa // RUN: xchesscc_wrapper aie -c %S/kernel.cc -// RUN: %PYTHON aiecc.py --aiesim --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir b/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir index 6ce83815d6..6f6e685138 100644 --- a/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/07_shim_dma_core_function_with_loop/aie.mlir @@ -11,7 +11,7 @@ // clang -O2 --target=aie -c %S/kernel.cc // REQUIRES: valid_xchess_license, !hsa // RUN: xchesscc_wrapper aie -c %S/kernel.cc -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir b/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir index c28f87e766..d8220e22fb 100644 --- a/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir +++ b/test/unit_tests/chess_compiler_tests/08_tile_locks/aie.mlir @@ -10,7 +10,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir index 1e8eddcbcf..df2e82760f 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/01_precompiled_core_function/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: valid_xchess_license, !hsa // RUN: xchesscc_wrapper aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py -v --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py -v --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir index 28127efa6c..5842d8be78 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/02_precompiled_kernel/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: xchesscc_wrapper aie2 +l aie.mlir.prj/core_1_3.bcf %S/kernel.cc -o custom_1_3.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir index 1dd02738aa..91a7d0b13e 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/03_cascade_core_functions/aie.mlir @@ -10,7 +10,7 @@ // REQUIRES: valid_xchess_license, !hsa // RUN: xchesscc_wrapper aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir index 88c13f299d..308dda7ea6 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/03_simple/aie.mlir @@ -9,7 +9,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: sh -c 'aie.mlir.prj/aiesim.sh; exit 0' | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir index dd4725f8c6..b012ca0b3a 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie.mlir @@ -12,7 +12,7 @@ // aiecc.py -j0 --aiesim --xchesscc --xbridge aie.mlir -I/wrk/hdstaff/stephenn/nobkup/acdc-install-wsl/runtime_lib/x86_64/test_lib/include test.cpp -o test.elf -L/wrk/hdstaff/stephenn/nobkup/acdc-install-wsl/runtime_lib/x86_64/test_lib/lib -ltest_lib // aiecc.py -j0 --aiesim --xchesscc --xbridge aie.mlir -I/wrk/hdstaff/stephenn/nobkup/acdc-install-wsl/runtime_lib/x86_64/test_lib/include test.cpp -o test.elf /wrk/hdstaff/stephenn/nobkup/acdc-install-wsl/runtime_lib/x86_64/test_lib/lib/test_library.cpp -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir index cb8cf2881e..0b90f5a87f 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/04_shared_memory/aie_row.mlir @@ -9,7 +9,7 @@ // //===----------------------------------------------------------------------===// -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s %test_lib_flags %extraAieCcFlags% %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: aie_row.mlir.prj/aiesim.sh | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir index a2dbedf747..a2c9a23e00 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/04_shim_dma_kernel/aie.mlir @@ -9,8 +9,8 @@ // //===----------------------------------------------------------------------===// -// REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// REQUIRES: valid_xchess_license, !!hsa +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: xchesscc_wrapper aie2 +l aie.mlir.prj/core_7_3.bcf %S/kernel.cc -o custom_7_3.elf // RUN: %run_on_board ./test.elf diff --git a/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir index feba4e23eb..0280920753 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/05_shim_dma_core_function/aie.mlir @@ -11,7 +11,7 @@ // REQUIRES: valid_xchess_license, !hsa // RUN: xchesscc_wrapper aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // FIXME this hangs in simulation diff --git a/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir index de3345fadb..56f444b1d7 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/07_shim_dma_core_function_with_loop/aie.mlir @@ -11,7 +11,7 @@ // clang -O2 --target=aie -c %S/kernel.cc // REQUIRES: valid_xchess_license // RUN: xchesscc_wrapper aie2 -c %S/kernel.cc -// RUN: %PYTHON aiecc.py --aiesim --chesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --chesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // UN: aie.mlir.prj/aiesim.sh // XFAIL: * diff --git a/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir index df46768688..64e6369fc4 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/08_tile_locks/aie.mlir @@ -10,7 +10,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: sh -c 'aie.mlir.prj/aiesim.sh; exit 0' | FileCheck %s diff --git a/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir index 30b7813950..ad7d992fe5 100644 --- a/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir +++ b/test/unit_tests/chess_compiler_tests_aie2/09_memtile_locks/aie.mlir @@ -10,7 +10,7 @@ //===----------------------------------------------------------------------===// // REQUIRES: valid_xchess_license, !hsa -// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s -I%host_runtime_lib%/test_lib/include -L%host_runtime_lib%/test_lib/lib -ltest_lib %S/test.cpp -o test.elf +// RUN: %PYTHON aiecc.py --aiesim --xchesscc --xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf // RUN: %run_on_board ./test.elf // RUN: sh -c 'aie.mlir.prj/aiesim.sh; exit 0' | FileCheck %s