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RESET GPIO #79

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martinribelotta opened this issue Oct 8, 2018 · 0 comments
Open

RESET GPIO #79

martinribelotta opened this issue Oct 8, 2018 · 0 comments

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@martinribelotta
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Description

The reset state of GPIO pins contains weak pullup (40-47K ~80uA). This cause spureous output activation in reset state and program download.

image

The output pulldown is 100K for CIAA-NXP and 330K for EDU-CIAA. this put the FET or BJT in polarized state.

FIX recomendation

  • Shrink the pulldown to ~10K due to prevent output transistor polarization, or...
  • Invert activation polarity of output circuit, or...
  • Detect in and-fashion circuit reset condition and disable all outputs
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