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ThreadX Context Save/Restore of Floating Point Registers for Cortex-R5 #385

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austinawolf opened this issue May 16, 2024 · 2 comments
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@austinawolf
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austinawolf commented May 16, 2024

I'm working on setting up ThreadX with Cortex-R5F on Xilinx Ultrascale+ R5F. I've noticed some data corruption associated with using floating point registers on memcpy and now looking at _tx_thread_context_save for R5 port, it seems like it doesn't save context floating point registers.

There are some references to VFP support on other processor ports but isn't much documentation to go off.

Is it possible to use hard floating point math on R5 with ThreadX?

@austinawolf austinawolf added the feature New feature or enhancement request label May 16, 2024
@austinawolf
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Some of the other ARM ports seem to have support for using TX_ENABLE_VFP_SUPPORT then using tx_thread_vfp_enable to enable it, but the R5 is missing is the extension define here:
https://github.com/eclipse-threadx/threadx/blob/master/ports/cortex_r5/gnu/inc/tx_port.h#L197

Like for the A9:
https://github.com/eclipse-threadx/threadx/blob/master/ports/cortex_a9/gnu/inc/tx_port.h#L199

@ted0xff
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ted0xff commented May 30, 2024

Funny, seems related to our #382 two weeks before your report, we are on the same problematics

Our Quick and Dirty solution is , for now, building in softFP...

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