From 0520b59f27e766def2e7b70951acbc54a56198ef Mon Sep 17 00:00:00 2001
From: Groverkss <groverkss@gmail.com>
Date: Fri, 25 Aug 2023 14:54:21 +0530
Subject: [PATCH] [Codegen][CUDA] Add emulateNarrowTypes to LLVMGPU Codegen

---
 compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp b/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp
index 261f70992fea..19ec90733995 100644
--- a/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp
+++ b/compiler/src/iree/compiler/Codegen/LLVMGPU/Passes.cpp
@@ -547,7 +547,11 @@ static void addLowerToLLVMGPUPasses(OpPassManager &pm, bool useROCM) {
 
   pm.addNestedPass<func::FuncOp>(memref::createExpandOpsPass());
   pm.addPass(memref::createExpandStridedMetadataPass());
+  pm.addPass(memref::createFoldMemRefAliasOpsPass());
+  pm.addPass(createEmulateNarrowTypePass());
   pm.addPass(createLowerAffinePass());
+  pm.addPass(createCanonicalizerPass());
+  pm.addPass(createCSEPass());
   // Strip out the debug info for the kernel as CUDA driver doesn't diggest PTX
   // debug info well.
   pm.addPass(createStripDebugInfoPass());