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Testing of these devices seems to be revealing intermittent issues in the gateware:
One channel in 384 of both the LFP and Spike streams always seems to produce 0 values. This value appears in the first frame of a superframe, but its position changes between resets. Aside from the obviously incorrect value, the location switch leads to a lack of confidence in a consistent channel mapping between runs
The hub clock is placed at the end of the frame which is at least non-conventional
The sync words are included in the data frame, but are not used
The amplifier data is non-contiguous and should be reordered in the gateware to remove counter and reserved segments
The Q11.5 -> Q11 conversion should be done on the FPGA instead of packing fixed point values into the frame for no reason (10 bit ADC determines sample resolution, the extra 5 bits are useless)
The text was updated successfully, but these errors were encountered:
- Shank is currently left in default state
- See this issue for reason that support for this headstage should be
deprecated:
open-ephys/onix-headstage-neuropix1#3
Testing of these devices seems to be revealing intermittent issues in the gateware:
The text was updated successfully, but these errors were encountered: