ePMP SAIL

[jjscheel]

Technical Group

Privileged Spec IC

ratification-pkg

Priv 1.12

Technical Liaison

Nick Kosifidis

Task Category

SAIL model

Task Sub Category

• gcc
• binutils
• gdb
• intrinsics
• Java
• KVM
• ld
• llvm
• Linux kernel
• QEMU
• Spike

Ratification Target

3Q2023

Statement of Work (SOW)

SOW: link

SOW Signoffs: (delete those not needed)

• Task group liaison sign-off date:
• Development partner sign-off date:

Waiver

• Freeze
• Ratification

Pull Request Details

PR: link

[jjscheel]

Status from Umer:

ePMP Sail task: As our PR is still in review, bill has added a switch to enable/disable ePMP in Sail, that PR has not been merged yet, once bill will merge that feature, ePMP Sail support will also be merged.

[jjscheel]

@UmerShahidengr, can you provide a new target completion date given the previously mentioned dependencies?

[UmerShahidengr]

We will complete it till the end of this month at max.

[jjscheel]

Thanks. New target completion set to April 30.

[HamzaKh01]

This is still pending according to this #12 (comment)

[jjscheel]

Given that this didn't complete in April, should I assume end of May or are we progressing, @HamzaKh01? What's your outlook?

[UmerShahidengr]

@HamzaKh01 and @billmcspadden-riscv , I am not sure what is the latest update on it. Can you please comment when will it be completed?

[HamzaKh01]

I need the switch implementation which I will get, when this PR-246 gets merged. I can't say anything about, when this be done .Bill is the author of this PR .Once this PR gets merged only then will my PR be able to merge because my implementation depends on it.

[jjscheel]

Thanks. Let's set Projected completion for 2 weeks and discuss more next meeting. Dropping from Agenda.

[UmerShahidengr]

Update May 23rd, 2023 => Not much update on this task yet. Still waiting it to be merged.

[jjscheel]

Thanks, @UmerShahidengr. Removing from this week's agenda. Touch base again in 2 weeks.

@HamzaKh01, did we get the switch implementation? Is all code written and submitted via PR now?

[HamzaKh01]

@HamzaKh01, did we get the switch implementation?

PR of the switch implementation has been created by Bill, but not merged into the master.

[UmerShahidengr]

Update ⇾ June 12th, 2023:
PR is still pending

[jjscheel]

@UmerShahidengr, @HamzaKh01, are we making progress on the discussion in the PR? There seems to be some confusion here.

[billmcspadden-riscv]

While we wait to get agreement on Sail model configuration, there is a workaround wherein the ePMP implementation can be tested.

Within the Sail ePMP implementation, create a function named "haveEPMP()" that returns "true". Put that function in riscv_sys_regs.sail. This will allow you to do some testing on your branch.

This function will be implemented (by parsing the ISA string) once we figure out the right way to parse the ISA string.

Bill Mc.

[jrtc27]

As I've said elsewhere before, we cannot block extensions on having an -march parser in the Sail model. We've taken extensions without that in the past, and there's no reason we can't continue to do so until such time as -march option support is properly implemented, which will be on the order of months, not days or weeks, given its complexity and the current needs-a-total-rewrite state of the current draft -march PR (which also doesn't even attempt to support it in the OCaml-based simulator, only the C one).

[HamzaKh01]

While we wait to get agreement on Sail model configuration, there is a workaround wherein the ePMP implementation can be tested .Within the Sail ePMP implementation, create a function named "haveEPMP()" that returns "true". Put that function in riscv_sys_regs.sail. This will allow you to do some testing on your branch.

I have tested my implementation quite a few times back by this same method.

As I've said elsewhere before, we cannot block extensions on having an -march parser in the Sail model. We've taken extensions without that in the past, and there's no reason we can't continue to do so

I was not aware of this earlier I was asked to modify my implementation as if there is a command-line switch to enable and disable ePMP so, I did that.

[UmerShahidengr]

Update ⇾ July 11th, 2023
PR is stalled. No progress has been made yet.

[jjscheel]

@UmerShahidengr, please review the PR stall and let me know if there is anything we can do to achieve forward progress. Thanks!

[UmerShahidengr]

Dear @jjscheel, @HamzaKh01 has already completed the checklist and he has removed all dependencies. It is final from my side. I also request @billmcspadden-riscv to merge it so that this SoW gets closed.

[UmerShahidengr]

Update ⇾ Aug 15th, 2023
PR is stalled, Thanks to @marnovandermaas and @allenjbaum, some reviews were done on this PR but it is still not merged yet.

[UmerShahidengr]

Update ⇾ September 12th, 2023
No update on this. PR is still stalled.

[jjscheel]

@billmcspadden-riscv, can you provide some guidance on what is needed to make progress here? Thanks!

[UmerShahidengr]

Update ⇾ September 26th, 2023
No update on this.

[UmerShahidengr]

Update ⇾ October 10th, 2023
No update on this.

[UmerShahidengr]

Update ⇾ October 24th, 2023
No update on this.

[UmerShahidengr]

Update ⇾ November 28th, 2023
No update on this.

[UmerShahidengr]

Update ⇾ December 12th, 2023
Stalled

[UmerShahidengr]

Update ⇾ January 30th, 2024
Stalled

[jjscheel]

Understand. Will discuss in today's meeting.

[jjscheel]

@billmcspadden-riscv, this is queued behind your test framework work. Correct?

[UmerShahidengr]

Update ⇾ March 5th, 2024
Stalled.

[jjscheel]

@billmcspadden-riscv, FYI.

[jjscheel]

Any update @billmcspadden-riscv?

[UmerShahidengr]

Update April 30th, 2024:
Stalled, no update

[billmcspadden-riscv]

I've added the command line support for Smepmp. You can find my code on the
branch, haveSmepmp_billmcspadden (https://github.com/riscv/sail-riscv/tree/haveSmepmp_billmcspadden),
in the sail-riscv repo.

The command line switch is: --enable-smepmp
The Sail functional interface is: bool haveSmepmp()

I would suggest that you merge my code onto your branch and make
a unified PR that incorporates both my code and yours.

[jjscheel]

@UmerShahidengr, please let us know if you need anything else from Bill.

[UmerShahidengr]

Update June 11th, 2024:
@billmcspadden-riscv we shelved this project and deallocated the resources in the last quarter, we will assign new resources in the next quarter to wrap this up. We dont have any immediate resources to take up this work. I will update you once I resume this project.

[jjscheel]

Will re-visit in July.