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0001-Patched-for-gcc-bug.patch
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0001-Patched-for-gcc-bug.patch
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From 4617be139becec0e5d7823c1d86d12015e0ac5c6 Mon Sep 17 00:00:00 2001
From: Yoshi <yoshijava@gmail.com>
Date: Wed, 16 Dec 2020 12:44:31 +0800
Subject: [PATCH] Patched for gcc bug
---
builtins.c | 2 +-
c-convert.c | 162 +-
c-decl.c | 1 +
config.h | 1 +
expmed.c | 4 +-
expr.c | 38 +-
fibheap.h | 2 +-
graph.c | 2 +-
hashtab.h | 2 +-
i386.c | 28 +-
insn-emit.c | 3 +-
insn-output.c | 1088 +++---
main.c | 52 +-
optabs.c | 8814 ++++++++++++++++++++++++-------------------------
optabs.h | 15 +-
partition.h | 2 +-
recog.c | 5218 ++++++++++++++---------------
recog.h | 17 +-
reload1.c | 8 +-
safe-ctype.c | 2 +-
splay-tree.h | 2 +-
stor-layout.c | 2950 ++++++++---------
system.h | 4 +-
vasprintf.c | 2 +-
24 files changed, 9225 insertions(+), 9194 deletions(-)
diff --git a/builtins.c b/builtins.c
index c3d6ae9..aa75846 100644
--- a/builtins.c
+++ b/builtins.c
@@ -1644,7 +1644,7 @@ expand_builtin_strlen (exp, target)
char_mode))
char_rtx = copy_to_mode_reg (char_mode, char_rtx);
- pat = GEN_FCN (icode) (result, gen_rtx_MEM (BLKmode, src_reg),
+ pat = GEN_FCN4 (icode) (result, gen_rtx_MEM (BLKmode, src_reg),
char_rtx, GEN_INT (align));
if (! pat)
return 0;
diff --git a/expmed.c b/expmed.c
index ab127ec..812e55a 100644
--- a/expmed.c
+++ b/expmed.c
@@ -444,7 +444,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, total_size)
abort ();
}
- emit_insn (GEN_FCN (icode)
+ emit_insn (GEN_FCN2 (icode)
(gen_rtx_SUBREG (fieldmode, op0,
(bitnum % BITS_PER_WORD) / BITS_PER_UNIT
+ (offset * UNITS_PER_WORD)),
@@ -4410,7 +4410,7 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep)
|| ! (*pred) (subtarget, compare_mode))
subtarget = gen_reg_rtx (compare_mode);
- pattern = GEN_FCN (icode) (subtarget);
+ pattern = GEN_FCN1 (icode) (subtarget);
if (pattern)
{
emit_insn (pattern);
diff --git a/expr.c b/expr.c
index a6ec546..f8224ed 100644
--- a/expr.c
+++ b/expr.c
@@ -123,7 +123,7 @@ static rtx enqueue_insn PARAMS ((rtx, rtx));
static unsigned HOST_WIDE_INT move_by_pieces_ninsns
PARAMS ((unsigned HOST_WIDE_INT,
unsigned int));
-static void move_by_pieces_1 PARAMS ((rtx (*) (rtx, ...), enum machine_mode,
+static void move_by_pieces_1 PARAMS ((rtx (*) (rtx, rtx), enum machine_mode,
struct move_by_pieces *));
static rtx clear_by_pieces_1 PARAMS ((PTR, HOST_WIDE_INT,
enum machine_mode));
@@ -131,7 +131,7 @@ static void clear_by_pieces PARAMS ((rtx, unsigned HOST_WIDE_INT,
unsigned int));
static void store_by_pieces_1 PARAMS ((struct store_by_pieces *,
unsigned int));
-static void store_by_pieces_2 PARAMS ((rtx (*) (rtx, ...),
+static void store_by_pieces_2 PARAMS ((rtx (*) (rtx, rtx),
enum machine_mode,
struct store_by_pieces *));
static rtx get_subtarget PARAMS ((rtx));
@@ -1493,7 +1493,7 @@ move_by_pieces (to, from, len, align)
icode = mov_optab->handlers[(int) mode].insn_code;
if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
- move_by_pieces_1 (GEN_FCN (icode), mode, &data);
+ move_by_pieces_1 (GEN_FCN0 (icode), mode, &data);
max_size = GET_MODE_SIZE (mode);
}
@@ -1549,7 +1549,7 @@ move_by_pieces_ninsns (l, align)
static void
move_by_pieces_1 (genfun, mode, data)
- rtx (*genfun) PARAMS ((rtx, ...));
+ rtx (*genfun) PARAMS ((rtx, rtx));
enum machine_mode mode;
struct move_by_pieces *data;
{
@@ -1692,7 +1692,7 @@ emit_block_move (x, y, size)
if (pred != 0 && ! (*pred) (op2, mode))
op2 = copy_to_mode_reg (mode, op2);
- pat = GEN_FCN ((int) code) (x, y, op2, opalign);
+ pat = GEN_FCN4 ((int) code) (x, y, op2, opalign);
if (pat)
{
emit_insn (pat);
@@ -2514,7 +2514,7 @@ store_by_pieces_1 (data, align)
icode = mov_optab->handlers[(int) mode].insn_code;
if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
- store_by_pieces_2 (GEN_FCN (icode), mode, data);
+ store_by_pieces_2 (GEN_FCN2 (icode), mode, data);
max_size = GET_MODE_SIZE (mode);
}
@@ -2530,7 +2530,7 @@ store_by_pieces_1 (data, align)
static void
store_by_pieces_2 (genfun, mode, data)
- rtx (*genfun) PARAMS ((rtx, ...));
+ rtx (*genfun) PARAMS ((rtx, rtx));
enum machine_mode mode;
struct store_by_pieces *data;
{
@@ -2633,7 +2633,7 @@ clear_storage (object, size)
if (pred != 0 && ! (*pred) (op1, mode))
op1 = copy_to_mode_reg (mode, op1);
- pat = GEN_FCN ((int) code) (object, op1, opalign);
+ pat = GEN_FCN3 ((int) code) (object, op1, opalign);
if (pat)
{
emit_insn (pat);
@@ -2820,7 +2820,7 @@ emit_move_insn_1 (x, y)
if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
return
- emit_insn (GEN_FCN (mov_optab->handlers[(int) mode].insn_code) (x, y));
+ emit_insn (GEN_FCN2 (mov_optab->handlers[(int) mode].insn_code) (x, y));
/* Expand complex moves by moving real part and imag part, if possible. */
else if ((class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
@@ -2894,17 +2894,17 @@ emit_move_insn_1 (x, y)
/* Note that the real part always precedes the imag part in memory
regardless of machine's endianness. */
#ifdef STACK_GROWS_DOWNWARD
- emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
+ emit_insn (GEN_FCN2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, XEXP (x, 0)),
gen_imagpart (submode, y)));
- emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
+ emit_insn (GEN_FCN2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, XEXP (x, 0)),
gen_realpart (submode, y)));
#else
- emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
+ emit_insn (GEN_FCN2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, XEXP (x, 0)),
gen_realpart (submode, y)));
- emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
+ emit_insn (GEN_FCN2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, XEXP (x, 0)),
gen_imagpart (submode, y)));
#endif
@@ -2981,9 +2981,9 @@ emit_move_insn_1 (x, y)
|| GET_CODE (imagpart_x) == SUBREG))
emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
- emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
+ emit_insn (GEN_FCN2 (mov_optab->handlers[(int) submode].insn_code)
(realpart_x, realpart_y));
- emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
+ emit_insn (GEN_FCN2 (mov_optab->handlers[(int) submode].insn_code)
(imagpart_x, imagpart_y));
}
@@ -3184,7 +3184,7 @@ emit_single_push_insn (mode, x, type)
if (((pred = insn_data[(int) icode].operand[0].predicate)
&& !((*pred) (x, mode))))
x = force_reg (mode, x);
- emit_insn (GEN_FCN (icode) (x));
+ emit_insn (GEN_FCN1 (icode) (x));
return;
}
if (GET_MODE_SIZE (mode) == rounded_size)
@@ -3431,7 +3431,7 @@ emit_push_insn (x, mode, type, size, align, partial, reg, extra,
if (pred != 0 && ! (*pred) (op2, mode))
op2 = copy_to_mode_reg (mode, op2);
- pat = GEN_FCN ((int) code) (target, xinner,
+ pat = GEN_FCN4 ((int) code) (target, xinner,
op2, opalign);
if (pat)
{
@@ -9125,7 +9125,7 @@ expand_increment (exp, post, ignore)
if (! (*insn_data[icode].operand[2].predicate) (op1, mode))
op1 = force_reg (mode, op1);
- return enqueue_insn (op0, GEN_FCN (icode) (op0, op0, op1));
+ return enqueue_insn (op0, GEN_FCN3 (icode) (op0, op0, op1));
}
if (icode != (int) CODE_FOR_nothing && GET_CODE (op0) == MEM)
{
@@ -9142,7 +9142,7 @@ expand_increment (exp, post, ignore)
/* The increment queue is LIFO, thus we have to `queue'
the instructions in reverse order. */
enqueue_insn (op0, gen_move_insn (op0, temp));
- result = enqueue_insn (temp, GEN_FCN (icode) (temp, temp, op1));
+ result = enqueue_insn (temp, GEN_FCN3 (icode) (temp, temp, op1));
return result;
}
}
diff --git a/i386.c b/i386.c
index f07ebad..ccefff3 100644
--- a/i386.c
+++ b/i386.c
@@ -11511,7 +11511,7 @@ ix86_expand_binop_builtin (icode, arglist, target)
if (GET_CODE (op0) == MEM && GET_CODE (op1) == MEM)
op0 = copy_to_mode_reg (mode0, op0);
- pat = GEN_FCN (icode) (target, op0, op1);
+ pat = GEN_FCN3 (icode) (target, op0, op1);
if (! pat)
return 0;
emit_insn (pat);
@@ -11549,7 +11549,7 @@ ix86_expand_timode_binop_builtin (icode, arglist, target)
if (GET_CODE (op0) == MEM && GET_CODE (op1) == MEM)
op0 = copy_to_mode_reg (TImode, op0);
- pat = GEN_FCN (icode) (target, op0, op1);
+ pat = GEN_FCN3 (icode) (target, op0, op1);
if (! pat)
return 0;
emit_insn (pat);
@@ -11580,7 +11580,7 @@ ix86_expand_store_builtin (icode, arglist)
if (! (*insn_data[icode].operand[1].predicate) (op1, mode1))
op1 = copy_to_mode_reg (mode1, op1);
- pat = GEN_FCN (icode) (op0, op1);
+ pat = GEN_FCN2 (icode) (op0, op1);
if (pat)
emit_insn (pat);
return 0;
@@ -11616,7 +11616,7 @@ ix86_expand_unop_builtin (icode, arglist, target, do_load)
op0 = copy_to_mode_reg (mode0, op0);
}
- pat = GEN_FCN (icode) (target, op0);
+ pat = GEN_FCN2 (icode) (target, op0);
if (! pat)
return 0;
emit_insn (pat);
@@ -11653,7 +11653,7 @@ ix86_expand_unop1_builtin (icode, arglist, target)
if (! (*insn_data[icode].operand[2].predicate) (op1, mode0))
op1 = copy_to_mode_reg (mode0, op1);
- pat = GEN_FCN (icode) (target, op0, op1);
+ pat = GEN_FCN3 (icode) (target, op0, op1);
if (! pat)
return 0;
emit_insn (pat);
@@ -11705,7 +11705,7 @@ ix86_expand_sse_compare (d, arglist, target)
op1 = copy_to_mode_reg (mode1, op1);
op2 = gen_rtx_fmt_ee (comparison, mode0, op0, op1);
- pat = GEN_FCN (d->icode) (target, op0, op1, op2);
+ pat = GEN_FCN4 (d->icode) (target, op0, op1, op2);
if (! pat)
return 0;
emit_insn (pat);
@@ -11754,7 +11754,7 @@ ix86_expand_sse_comi (d, arglist, target)
op1 = copy_to_mode_reg (mode1, op1);
op2 = gen_rtx_fmt_ee (comparison, mode0, op0, op1);
- pat = GEN_FCN (d->icode) (op0, op1, op2);
+ pat = GEN_FCN3 (d->icode) (op0, op1, op2);
if (! pat)
return 0;
emit_insn (pat);
@@ -11823,7 +11823,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
- pat = GEN_FCN (icode) (target, op0, op1);
+ pat = GEN_FCN3 (icode) (target, op0, op1);
if (! pat)
return 0;
emit_insn (pat);
@@ -11856,7 +11856,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
- pat = GEN_FCN (icode) (target, op0, op1, op2);
+ pat = GEN_FCN4 (icode) (target, op0, op1, op2);
if (! pat)
return 0;
emit_insn (pat);
@@ -11881,7 +11881,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
op1 = copy_to_mode_reg (mode1, op1);
if (! (*insn_data[icode].operand[2].predicate) (op2, mode2))
op2 = copy_to_mode_reg (mode2, op2);
- pat = GEN_FCN (icode) (op0, op1, op2);
+ pat = GEN_FCN3 (icode) (op0, op1, op2);
if (! pat)
return 0;
emit_insn (pat);
@@ -11943,7 +11943,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
- pat = GEN_FCN (icode) (target, op0, op1);
+ pat = GEN_FCN3 (icode) (target, op0, op1);
if (! pat)
return 0;
emit_insn (pat);
@@ -11964,7 +11964,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
op1 = copy_to_mode_reg (mode1, op1);
- pat = GEN_FCN (icode) (op0, op0, op1);
+ pat = GEN_FCN3 (icode) (op0, op0, op1);
if (! pat)
return 0;
emit_insn (pat);
@@ -12014,7 +12014,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
- pat = GEN_FCN (icode) (target, op0, op1, op2);
+ pat = GEN_FCN4 (icode) (target, op0, op1, op2);
if (! pat)
return 0;
emit_insn (pat);
@@ -12042,7 +12042,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
- pat = GEN_FCN (icode) (target, op0, op1);
+ pat = GEN_FCN3 (icode) (target, op0, op1);
if (! pat)
return 0;
emit_insn (pat);
diff --git a/insn-output.c b/insn-output.c
index 76fea20..2e291b0 100644
--- a/insn-output.c
+++ b/insn-output.c
@@ -19283,7 +19283,7 @@ const struct insn_data insn_data[] =
{
"cmpdi_ccno_1_rex64",
(const PTR) output_0,
- (insn_gen_fn) gen_cmpdi_ccno_1_rex64,
+ (void *) gen_cmpdi_ccno_1_rex64,
&operand_data[1],
2,
0,
@@ -19303,7 +19303,7 @@ const struct insn_data insn_data[] =
{
"cmpdi_1_insn_rex64",
"cmp{q}\t{%1, %0|%0, %1}",
- (insn_gen_fn) gen_cmpdi_1_insn_rex64,
+ (void *) gen_cmpdi_1_insn_rex64,
&operand_data[5],
2,
0,
@@ -19433,7 +19433,7 @@ const struct insn_data insn_data[] =
{
"cmpqi_ext_3_insn",
"cmp{b}\t{%1, %h0|%h0, %1}",
- (insn_gen_fn) gen_cmpqi_ext_3_insn,
+ (void *) gen_cmpqi_ext_3_insn,
&operand_data[24],
2,
0,
@@ -19443,7 +19443,7 @@ const struct insn_data insn_data[] =
{
"cmpqi_ext_3_insn_rex64",
"cmp{b}\t{%1, %h0|%h0, %1}",
- (insn_gen_fn) gen_cmpqi_ext_3_insn_rex64,
+ (void *) gen_cmpqi_ext_3_insn_rex64,
&operand_data[26],
2,
0,
@@ -19583,7 +19583,7 @@ const struct insn_data insn_data[] =
{
"x86_fnstsw_1",
"fnstsw\t%0",
- (insn_gen_fn) gen_x86_fnstsw_1,
+ (void *) gen_x86_fnstsw_1,
&operand_data[30],
1,
0,
@@ -19593,7 +19593,7 @@ const struct insn_data insn_data[] =
{
"x86_sahf_1",
"sahf",
- (insn_gen_fn) gen_x86_sahf_1,
+ (void *) gen_x86_sahf_1,
&operand_data[60],
1,
0,
@@ -19703,7 +19703,7 @@ const struct insn_data insn_data[] =
{
"popsi1",
"pop{l}\t%0",
- (insn_gen_fn) gen_popsi1,
+ (void *) gen_popsi1,
&operand_data[69],
1,
0,
@@ -20013,7 +20013,7 @@ const struct insn_data insn_data[] =
{
"movsi_insv_1",
"mov{b}\t{%b1, %h0|%h0, %b1}",
- (insn_gen_fn) gen_movsi_insv_1,
+ (void *) gen_movsi_insv_1,
&operand_data[124],
2,
0,
@@ -20053,7 +20053,7 @@ const struct insn_data insn_data[] =
{
"pushdi2_rex64",
(const PTR) output_77,
- (insn_gen_fn) gen_pushdi2_rex64,
+ (void *) gen_pushdi2_rex64,
&operand_data[132],
2,
0,
@@ -20083,7 +20083,7 @@ const struct insn_data insn_data[] =
{
"popdi1",
"pop{q}\t%0",
- (insn_gen_fn) gen_popdi1,
+ (void *) gen_popdi1,
&operand_data[136],
1,
0,
@@ -20333,7 +20333,7 @@ const struct insn_data insn_data[] =
{
"swapxf",
(const PTR) output_105,
- (insn_gen_fn) gen_swapxf,
+ (void *) gen_swapxf,
&operand_data[185],
2,
2,
@@ -20343,7 +20343,7 @@ const struct insn_data insn_data[] =
{
"swaptf",
(const PTR) output_106,
- (insn_gen_fn) gen_swaptf,
+ (void *) gen_swaptf,
&operand_data[187],
2,
2,
@@ -20353,7 +20353,7 @@ const struct insn_data insn_data[] =
{
"zero_extendhisi2_and",
"#",
- (insn_gen_fn) gen_zero_extendhisi2_and,
+ (void *) gen_zero_extendhisi2_and,
&operand_data[189],
2,
0,
@@ -20433,7 +20433,7 @@ const struct insn_data insn_data[] =
{
"zero_extendsidi2_32",
"#",
- (insn_gen_fn) gen_zero_extendsidi2_32,
+ (void *) gen_zero_extendsidi2_32,
&operand_data[205],
2,
0,
@@ -20443,7 +20443,7 @@ const struct insn_data insn_data[] =
{
"zero_extendsidi2_rex64",
(const PTR) output_116,
- (insn_gen_fn) gen_zero_extendsidi2_rex64,
+ (void *) gen_zero_extendsidi2_rex64,
&operand_data[207],
2,
0,
@@ -20453,7 +20453,7 @@ const struct insn_data insn_data[] =
{
"zero_extendhidi2",
(const PTR) output_117,
- (insn_gen_fn) gen_zero_extendhidi2,
+ (void *) gen_zero_extendhidi2,
&operand_data[209],
2,
0,
@@ -20463,7 +20463,7 @@ const struct insn_data insn_data[] =
{
"zero_extendqidi2",
(const PTR) output_118,
- (insn_gen_fn) gen_zero_extendqidi2,
+ (void *) gen_zero_extendqidi2,
&operand_data[211],
2,
0,
@@ -20483,7 +20483,7 @@ const struct insn_data insn_data[] =
{
"extendsidi2_rex64",
(const PTR) output_120,
- (insn_gen_fn) gen_extendsidi2_rex64,
+ (void *) gen_extendsidi2_rex64,
&operand_data[216],
2,
0,
@@ -20493,7 +20493,7 @@ const struct insn_data insn_data[] =
{
"extendhidi2",
"movs{wq|x}\t{%1,%0|%0, %1}",
- (insn_gen_fn) gen_extendhidi2,
+ (void *) gen_extendhidi2,
&operand_data[218],
2,
0,
@@ -20503,7 +20503,7 @@ const struct insn_data insn_data[] =
{
"extendqidi2",
"movs{bq|x}\t{%1,%0|%0, %1}",
- (insn_gen_fn) gen_extendqidi2,
+ (void *) gen_extendqidi2,
&operand_data[220],
2,
0,
@@ -20513,7 +20513,7 @@ const struct insn_data insn_data[] =
{
"extendhisi2",
(const PTR) output_123,
- (insn_gen_fn) gen_extendhisi2,
+ (void *) gen_extendhisi2,
&operand_data[222],
2,
0,
@@ -20533,7 +20533,7 @@ const struct insn_data insn_data[] =
{
"extendqihi2",
(const PTR) output_125,
- (insn_gen_fn) gen_extendqihi2,
+ (void *) gen_extendqihi2,
&operand_data[226],
2,
0,
@@ -20543,7 +20543,7 @@ const struct insn_data insn_data[] =
{
"extendqisi2",
"movs{bl|x}\t{%1,%0|%0, %1}",
- (insn_gen_fn) gen_extendqisi2,
+ (void *) gen_extendqisi2,
&operand_data[203],
2,
0,
@@ -20703,7 +20703,7 @@ const struct insn_data insn_data[] =
{
"truncdfsf2_3",
(const PTR) output_142,
- (insn_gen_fn) gen_truncdfsf2_3,
+ (void *) gen_truncdfsf2_3,
&operand_data[258],
2,
0,
@@ -20713,7 +20713,7 @@ const struct insn_data insn_data[] =
{
"truncdfsf2_sse_only",
"cvtsd2ss\t{%1, %0|%0, %1}",
- (insn_gen_fn) gen_truncdfsf2_sse_only,
+ (void *) gen_truncdfsf2_sse_only,
&operand_data[260],
2,
0,
@@ -20813,7 +20813,7 @@ const struct insn_data insn_data[] =
{
"fix_truncdi_nomemory",
"#",
- (insn_gen_fn) gen_fix_truncdi_nomemory,
+ (void *) gen_fix_truncdi_nomemory,
&operand_data[282],
6,
0,
@@ -20823,7 +20823,7 @@ const struct insn_data insn_data[] =
{
"fix_truncdi_memory",
(const PTR) output_154,
- (insn_gen_fn) gen_fix_truncdi_memory,
+ (void *) gen_fix_truncdi_memory,
&operand_data[288],
5,
0,
@@ -20833,7 +20833,7 @@ const struct insn_data insn_data[] =
{
"fix_truncsfdi_sse",
"cvttss2si{q}\t{%1, %0|%0, %1}",
- (insn_gen_fn) gen_fix_truncsfdi_sse,
+ (void *) gen_fix_truncsfdi_sse,
&operand_data[293],
2,
0,
@@ -20843,7 +20843,7 @@ const struct insn_data insn_data[] =
{
"fix_truncdfdi_sse",
"cvttsd2si{q}\t{%1, %0|%0, %1}",
- (insn_gen_fn) gen_fix_truncdfdi_sse,
+ (void *) gen_fix_truncdfdi_sse,
&operand_data[295],
2,
0,
@@ -20863,7 +20863,7 @@ const struct insn_data insn_data[] =
{
"fix_truncsi_nomemory",
"#",
- (insn_gen_fn) gen_fix_truncsi_nomemory,
+ (void *) gen_fix_truncsi_nomemory,
&operand_data[297],
5,
0,
@@ -20873,7 +20873,7 @@ const struct insn_data insn_data[] =
{
"fix_truncsi_memory",
(const PTR) output_159,
- (insn_gen_fn) gen_fix_truncsi_memory,
+ (void *) gen_fix_truncsi_memory,
&operand_data[302],
4,
0,
@@ -20883,7 +20883,7 @@ const struct insn_data insn_data[] =
{
"fix_truncsfsi_sse",
"cvttss2si\t{%1, %0|%0, %1}",
- (insn_gen_fn) gen_fix_truncsfsi_sse,
+ (void *) gen_fix_truncsfsi_sse,
&operand_data[306],
2,
0,
@@ -20893,7 +20893,7 @@ const struct insn_data insn_data[] =
{
"fix_truncdfsi_sse",
"cvttsd2si\t{%1, %0|%0, %1}",
- (insn_gen_fn) gen_fix_truncdfsi_sse,
+ (void *) gen_fix_truncdfsi_sse,
&operand_data[308],
2,
0,
@@ -20913,7 +20913,7 @@ const struct insn_data insn_data[] =
{
"fix_trunchi_nomemory",
"#",
- (insn_gen_fn) gen_fix_trunchi_nomemory,
+ (void *) gen_fix_trunchi_nomemory,
&operand_data[310],
5,
0,
@@ -20923,7 +20923,7 @@ const struct insn_data insn_data[] =
{
"fix_trunchi_memory",
(const PTR) output_164,
- (insn_gen_fn) gen_fix_trunchi_memory,
+ (void *) gen_fix_trunchi_memory,
&operand_data[315],
4,
0,
@@ -20933,7 +20933,7 @@ const struct insn_data insn_data[] =
{
"x86_fnstcw_1",
"fnstcw\t%0",
- (insn_gen_fn) gen_x86_fnstcw_1,
+ (void *) gen_x86_fnstcw_1,
&operand_data[315],
1,
0,
@@ -20943,7 +20943,7 @@ const struct insn_data insn_data[] =
{
"x86_fldcw_1",
"fldcw\t%0",
- (insn_gen_fn) gen_x86_fldcw_1,
+ (void *) gen_x86_fldcw_1,
&operand_data[290],
1,
0,
@@ -20953,7 +20953,7 @@ const struct insn_data insn_data[] =
{
"floathisf2",
(const PTR) output_167,
- (insn_gen_fn) gen_floathisf2,
+ (void *) gen_floathisf2,
&operand_data[319],
2,
0,
@@ -21013,7 +21013,7 @@ const struct insn_data insn_data[] =
{
"floathidf2",
(const PTR) output_173,
- (insn_gen_fn) gen_floathidf2,
+ (void *) gen_floathidf2,
&operand_data[331],
2,
0,
@@ -21073,7 +21073,7 @@ const struct insn_data insn_data[] =
{
"floathixf2",
(const PTR) output_179,
- (insn_gen_fn) gen_floathixf2,
+ (void *) gen_floathixf2,
&operand_data[343],
2,
0,
@@ -21083,7 +21083,7 @@ const struct insn_data insn_data[] =
{
"floathitf2",
(const PTR) output_180,
- (insn_gen_fn) gen_floathitf2,
+ (void *) gen_floathitf2,
&operand_data[345],
2,
0,
@@ -21093,7 +21093,7 @@ const struct insn_data insn_data[] =
{
"floatsixf2",
(const PTR) output_181,
- (insn_gen_fn) gen_floatsixf2,
+ (void *) gen_floatsixf2,
&operand_data[347],
2,
0,
@@ -21103,7 +21103,7 @@ const struct insn_data insn_data[] =
{
"floatsitf2",
(const PTR) output_182,
- (insn_gen_fn) gen_floatsitf2,
+ (void *) gen_floatsitf2,
&operand_data[349],
2,
0,
@@ -21113,7 +21113,7 @@ const struct insn_data insn_data[] =
{
"floatdixf2",
(const PTR) output_183,
- (insn_gen_fn) gen_floatdixf2,
+ (void *) gen_floatdixf2,
&operand_data[351],
2,
0,
@@ -21123,7 +21123,7 @@ const struct insn_data insn_data[] =
{
"floatditf2",
(const PTR) output_184,
- (insn_gen_fn) gen_floatditf2,
+ (void *) gen_floatditf2,
&operand_data[353],
2,
0,
@@ -21193,7 +21193,7 @@ const struct insn_data insn_data[] =
{
"addqi3_cc",
"add{b}\t{%2, %0|%0, %2}",
- (insn_gen_fn) gen_addqi3_cc,
+ (void *) gen_addqi3_cc,
&operand_data[367],
3,
2,
@@ -21363,7 +21363,7 @@ const struct insn_data insn_data[] =
{
"addsi_1_zext",
(const PTR) output_208,
- (insn_gen_fn) gen_addsi_1_zext,
+ (void *) gen_addsi_1_zext,
&operand_data[420],
3,
0,
@@ -21553,7 +21553,7 @@ const struct insn_data insn_data[] =
{
"addqi_ext_1",
(const PTR) output_227,
- (insn_gen_fn) gen_addqi_ext_1,
+ (void *) gen_addqi_ext_1,
&operand_data[465],
3,
0,
@@ -21593,7 +21593,7 @@ const struct insn_data insn_data[] =
{
"subdi3_carry_rex64",
"sbb{q}\t{%2, %0|%0, %2}",
- (insn_gen_fn) gen_subdi3_carry_rex64,
+ (void *) gen_subdi3_carry_rex64,
&operand_data[477],
3,
0,
@@ -21633,7 +21633,7 @@ const struct insn_data insn_data[] =
{
"subsi3_carry",
"sbb{l}\t{%2, %0|%0, %2}",
- (insn_gen_fn) gen_subsi3_carry,
+ (void *) gen_subsi3_carry,
&operand_data[480],
3,
0,
@@ -21643,7 +21643,7 @@ const struct insn_data insn_data[] =
{
"subsi3_carry_zext",
"sbb{l}\t{%2, %k0|%k0, %2}",
- (insn_gen_fn) gen_subsi3_carry_zext,
+ (void *) gen_subsi3_carry_zext,
&operand_data[483],
3,
0,
@@ -21943,7 +21943,7 @@ const struct insn_data insn_data[] =
{
"divqi3",
"idiv{b}\t%2",
- (insn_gen_fn) gen_divqi3,
+ (void *) gen_divqi3,
&operand_data[537],
3,
0,
@@ -21953,7 +21953,7 @@ const struct insn_data insn_data[] =
{
"udivqi3",
"div{b}\t%2",
- (insn_gen_fn) gen_udivqi3,
+ (void *) gen_udivqi3,
&operand_data[537],
3,
0,
@@ -22023,7 +22023,7 @@ const struct insn_data insn_data[] =
{
"divmodhi4",
"cwtd\n\tidiv{w}\t%2",
- (insn_gen_fn) gen_divmodhi4,
+ (void *) gen_divmodhi4,
&operand_data[566],
4,
2,
@@ -22033,7 +22033,7 @@ const struct insn_data insn_data[] =
{
"udivmoddi4",
"xor{q}\t%3, %3\n\tdiv{q}\t%2",
- (insn_gen_fn) gen_udivmoddi4,
+ (void *) gen_udivmoddi4,
&operand_data[570],
4,
2,
@@ -22053,7 +22053,7 @@ const struct insn_data insn_data[] =
{
"udivmodsi4",
"xor{l}\t%3, %3\n\tdiv{l}\t%2",
- (insn_gen_fn) gen_udivmodsi4,
+ (void *) gen_udivmodsi4,
&operand_data[574],
4,
2,
@@ -22093,7 +22093,7 @@ const struct insn_data insn_data[] =
{
"testsi_1",
"test{l}\t{%1, %0|%0, %1}",
- (insn_gen_fn) gen_testsi_1,
+ (void *) gen_testsi_1,
&operand_data[585],
2,
0,
@@ -22303,7 +22303,7 @@ const struct insn_data insn_data[] =
{
"andqi_ext_0",
"and{b}\t{%2, %h0|%h0, %2}",
- (insn_gen_fn) gen_andqi_ext_0,
+ (void *) gen_andqi_ext_0,
&operand_data[629],
3,
0,
@@ -22833,7 +22833,7 @@ const struct insn_data insn_data[] =
{
"negsf2_memory",
"#",
- (insn_gen_fn) gen_negsf2_memory,
+ (void *) gen_negsf2_memory,
&operand_data[699],
2,
0,
@@ -22843,7 +22843,7 @@ const struct insn_data insn_data[] =
{
"negsf2_ifs",
"#",
- (insn_gen_fn) gen_negsf2_ifs,
+ (void *) gen_negsf2_ifs,
&operand_data[701],
3,
0,
@@ -22863,7 +22863,7 @@ const struct insn_data insn_data[] =
{
"negdf2_memory",
"#",
- (insn_gen_fn) gen_negdf2_memory,
+ (void *) gen_negdf2_memory,
&operand_data[706],
2,
0,
@@ -22873,7 +22873,7 @@ const struct insn_data insn_data[] =
{
"negdf2_ifs",
"#",
- (insn_gen_fn) gen_negdf2_ifs,
+ (void *) gen_negdf2_ifs,
&operand_data[708],
3,
0,
@@ -23023,7 +23023,7 @@ const struct insn_data insn_data[] =
{
"abssf2_memory",
"#",
- (insn_gen_fn) gen_abssf2_memory,
+ (void *) gen_abssf2_memory,
&operand_data[699],
2,
0,
@@ -23033,7 +23033,7 @@ const struct insn_data insn_data[] =
{
"abssf2_ifs",
"#",
- (insn_gen_fn) gen_abssf2_ifs,
+ (void *) gen_abssf2_ifs,
&operand_data[740],
3,
0,
@@ -23053,7 +23053,7 @@ const struct insn_data insn_data[] =
{
"absdf2_memory",
"#",
- (insn_gen_fn) gen_absdf2_memory,
+ (void *) gen_absdf2_memory,
&operand_data[706],
2,
0,
@@ -23063,7 +23063,7 @@ const struct insn_data insn_data[] =
{
"absdf2_ifs",
"#",
- (insn_gen_fn) gen_absdf2_ifs,
+ (void *) gen_absdf2_ifs,
&operand_data[743],
3,
0,
@@ -23333,7 +23333,7 @@ const struct insn_data insn_data[] =
{
"ashldi3_1",
"#",
- (insn_gen_fn) gen_ashldi3_1,
+ (void *) gen_ashldi3_1,
&operand_data[757],
4,
0,
@@ -23353,7 +23353,7 @@ const struct insn_data insn_data[] =
{
"x86_shld_1",
(const PTR) output_407,
- (insn_gen_fn) gen_x86_shld_1,
+ (void *) gen_x86_shld_1,
&operand_data[761],
3,
2,
@@ -23463,7 +23463,7 @@ const struct insn_data insn_data[] =
{
"ashrdi3_63_rex64",
(const PTR) output_418,
- (insn_gen_fn) gen_ashrdi3_63_rex64,
+ (void *) gen_ashrdi3_63_rex64,
&operand_data[794],
3,
0,
@@ -23513,7 +23513,7 @@ const struct insn_data insn_data[] =
{
"ashrdi3_1",
"#",
- (insn_gen_fn) gen_ashrdi3_1,
+ (void *) gen_ashrdi3_1,
&operand_data[757],
4,
0,
@@ -23533,7 +23533,7 @@ const struct insn_data insn_data[] =
{
"x86_shrd_1",
(const PTR) output_425,
- (insn_gen_fn) gen_x86_shrd_1,
+ (void *) gen_x86_shrd_1,
&operand_data[761],
3,
2,
@@ -23543,7 +23543,7 @@ const struct insn_data insn_data[] =
{
"ashrsi3_31",
(const PTR) output_426,