Two log messages are over 80 chars and thus are truncated.

Shorten them without losing the sense.

Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
Change-Id: I840c6de0c555f5e8a7f7a30104eda3af44f80c4e

A couple of helper functions and variables in the CMN Cyprus driver are
used only in the Debug build. So, if the module is compiled in a Release
build, the compiler throws unused variable/function warnings. Hence, add
workaround to suppress the warning.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I99fcc836f3a039655880fb0b861e1e883a0de3bf

The Clang compiler considers uint32_t data type as 'unsigned int'
whereas the GCC considers it as 'long unsigned int'. A potential
solution is to use PRIx format specifiers provided in the inttypes
header but it is not compatible with aarch64 host machines.

Hence, as a workaround, cast the uint32_t variables as unsigned int data
type when printing as the concerned variables are guaranteed to be under
16 bits.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I548f2709e2dfe460c176455b02982b33d1a2041e

The SID peripheral provides information about the platform and its
configuration. So, add the configuration data for sid module in scp
ramfw. The configuration data includes the expected value of its
PID/CID registers for identification. PID5, PID6 and PID7 are not
implemented by this peripheral and this is indicated using the valid
register bitmap.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I9ce8ad9eff33dedf32a6129fc5181871fe595fc3

System Info module provides API to obtain platform configuration data in
a platform independent manner. So, add configuration data for system
info module in scp ramfw. The configuration data specifies the PID
module as the driver to obtain the platform configuration data.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I5de1b605ec66057709ea407865958504b9410562

PL011 controller is used as a console port for debug and log messages.
Add config data of this controller in scp ramfw, including base address
and input clock frequency for the PL011 module to use.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I96ba337a98de643b1be6b998da05023308ac91e5

Configure the macros FMW_IO_STDIN_ID and FWM_IO_STDOUT_ID exposed by the
I/O framework to set the SCP UART as the system entity responsible for
handling I/O for the scp firmware.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I79424c10a61d2e12b8d1336cf4239f54d11b4c97

Add config data for armv7m_mpu module in scp ramfw. The SCP RAMs,
trusted RAM and non-trusted memory regions are specified.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I4b0ac74a322f997894a6f9140ebce5ba4a62600d

SCP's power control block includes registers for various system
configuration and status. Add the register space declaration for this
block.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I29cf403afa0b36b17f0a5e171e66a37a2ddf14b1

Core Manager block includes registers for configuration and clock
control for application cores and the associated clusters. Add the
register space declaration and the base address macro for the core
manager block.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I14c91e97947b70dd6c2e3fa885e9b9ef00a0713d

System Power Integration Kit (PIK) control register block includes
registers for clock control of clocks in SYSTOP power domain. Add
the register space declaration for System PIK.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: Ib6623d872b956923f0d604f33d0c710a9e702fc5

PLLs are connected to the SCP's expansion3 memory region. Add the
configuration data for the module 'system_pll' that will manage and
setup these PLLs to required frequency. The configuration data includes
the SYSTOP PLL and the interconnect PLL.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: Ia1d80d8631f7200069745130ee92f031008f58bb

The configuration data for PIK clock devices includes register address
of its control and dividers, the rate table and the initial rate. The
clock controller devices for all the CPUs, interconnect, systop, gic,
scp, uart and other clocks are included in the configuration data.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I5c41e4bfe379f41bf90fb6bcaf2e0f32bab535a1

The application core clocks is configured by the css clock driver. Add
the configuration data for this driver that includes the rate table,
initial rate and PLL driving each of the css clocks.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: I8d91329d2e41e020856002c619c735771062a105

Add functions to obtain the platform topology information such as core
count and cluster count. These functions can be used in module config
data to obtain platform topology.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: Ice0495d8f1dbb3541f3b3c47e0ab0bb756dffbd7

Provide the configuration data of all the available power domains to
the power domain HAL. The configuration data includes details of all the
supported CPU, cluster and the SYSTOP power domain.

Signed-off-by: Shriram K <shriram.k@arm.com>
Change-Id: If4a67cf0559668712fadc2d863e9a06feb569fbb

Some devices need overflow interrupt to update internal status. Add new
driver API to handle this if there is no acitve alarm.

Change-Id: I6a3106beb8dce8de7de29dfa5ff5742a9fd9692b
Signed-off-by: Joe Zhu <chunguang.zhu@verisilicon.com>