IR: Change VFNMLSScalarInsert to use IR::OpSize

FEX-Emu · Oct 28, 2024 · 027e762 · 027e762
1 parent 0e31077
commit 027e762
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/FEXCore/Source/Interface/IR/IR.json b/FEXCore/Source/Interface/IR/IR.json
@@ -1859,7 +1859,7 @@
         "NumElements": "RegisterSize / ElementSize",
         "TiedSource": 0
       },
-      "FPR = VFNMLSScalarInsert u8:#RegisterSize, u8:#ElementSize, FPR:$Upper, FPR:$Vector1, FPR:$Vector2, FPR:$Addend": {
+      "FPR = VFNMLSScalarInsert OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Upper, FPR:$Vector1, FPR:$Vector2, FPR:$Addend": {
         "Desc": [
           "Dest = (-Vector1 * Vector2) - Addend",
           "This explicitly matches x86 FMA semantics because ARM semantics are mind-bending.",