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MAINTAINERS: add RISC-V maintainer entry
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Edit MAINTAINERS to add myself as maintainer for RISC-V support.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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maroueneboubakri authored and jforissier committed Oct 3, 2023
1 parent ace93cc commit 559903c
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9 changes: 9 additions & 0 deletions MAINTAINERS
Original file line number Diff line number Diff line change
Expand Up @@ -308,6 +308,15 @@ R: Neal Liu <neal_liu@aspeedtech.com> [@Neal-liu]
S: Maintained
F: core/arch/arm/plat-aspeed/

RISC-V
R: Marouene Boubakri <marouene.boubakri@nxp.com> [@maroueneboubakri]
S: Maintained
F: core/arch/riscv/
F: lib/libutee/arch/riscv/
F: lib/libutils/ext/arch/riscv/
F: lib/libutils/isoc/arch/riscv/
F: ta/arch/riscv/

THE REST
M: Joakim Bech <joakim.bech@linaro.org> [@jbech-linaro]
M: Jens Wiklander <jens.wiklander@linaro.org> [@jenswi-linaro]
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