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plat-vexpress: configure CFG_CORE_ASYNC_NOTIF_GIC_INTID
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When compiled for SPMC at S-EL1 (CFG_CORE_SEL1_SPMC=y), configure
CFG_CORE_ASYNC_NOTIF_GIC_INTID to an unused secure SGI that can be
donated to the normal world.

In boot_primary_init_intc(), only donate the interrupt id if it's in the
predefined secure SGI range.

Fixes: 462028e ("qemu_armv8a: add GIC v3 redistributor base address")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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jenswi-linaro authored and jforissier committed Jan 12, 2024
1 parent 7313a9b commit 8e9d8ac
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Showing 2 changed files with 13 additions and 2 deletions.
8 changes: 8 additions & 0 deletions core/arch/arm/plat-vexpress/conf.mk
Original file line number Diff line number Diff line change
Expand Up @@ -81,6 +81,9 @@ CFG_AUTO_MAX_PA_BITS ?= y
ifeq ($(CFG_SCMI_SCPFW),y)
$(call force,CFG_SCMI_SCPFW_PRODUCT,optee-fvp)
endif
ifeq ($(CFG_CORE_SEL1_SPMC),y)
CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 9
endif
endif

ifeq ($(PLATFORM_FLAVOR),juno)
Expand Down Expand Up @@ -150,9 +153,14 @@ CFG_DTB_MAX_SIZE ?= 0x100000
ifeq ($(CFG_SCMI_SCPFW),y)
$(call force,CFG_SCMI_SCPFW_PRODUCT,optee-fvp)
endif

CFG_CORE_ASYNC_NOTIF ?= y
ifeq ($(CFG_CORE_SEL1_SPMC),y)
CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 8
else ifneq ($(CFG_CORE_SEL2_SPMC),y)
CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 219
endif
endif #PLATFORM_FLAVOR==qemu_armv8a

ifneq (,$(filter $(PLATFORM_FLAVOR),qemu_virt qemu_armv8a))
CFG_DT_DRIVER_EMBEDDED_TEST ?= y
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7 changes: 5 additions & 2 deletions core/arch/arm/plat-vexpress/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -62,8 +62,11 @@ void boot_primary_init_intc(void)
#endif
if (IS_ENABLED(CFG_CORE_SEL1_SPMC) &&
IS_ENABLED(CFG_CORE_ASYNC_NOTIF)) {
gic_init_donate_sgi_to_ns(GIC_SGI_SEC_BASE);
thread_spmc_set_async_notif_intid(GIC_SGI_SEC_BASE);
size_t it = CFG_CORE_ASYNC_NOTIF_GIC_INTID;

if (it >= GIC_SGI_SEC_BASE && it <= GIC_SGI_SEC_MAX)
gic_init_donate_sgi_to_ns(it);
thread_spmc_set_async_notif_intid(it);
}
}

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