drivers: implement HiSilicon Queue Management (QM) module

The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management module QM is used to interact with software.
Each accelerator module integrates a QM. Software issues tasks to the SQ
(Submmision Queue),and the QM obtains the address of the SQE (Submmision
Queue Element). The BD (Buffer Description, same as SQE) information is
sent to the accelerator. After the task processing is complete, the
accelerator applies for a write-back address from the QM to write back
the SQ.

Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core/arch/arm/plat-d06/conf.mk

@@ -8,6 +8,7 @@ CFG_WITH_PAGER ?= n
 CFG_WITH_SOFTWARE_PRNG ?= n
 CFG_WITH_STATS ?= y
 CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y
+CFG_HISILICON_CRYPTO_DRIVER ?= y
 
 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
@@ -27,4 +28,3 @@ CFG_TZDRAM_SIZE ?=     0x32000000
 CFG_SHMEM_START ?=     0x50000000
 CFG_SHMEM_SIZE ?=      0x04000000
 
-CFG_HISILICON_CRYPTO_DRIVER ?= y