crypto: fix an issue of multiple tasks using the same qp #6529
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| @@ -606,19 +606,25 @@ static enum hisi_drv_status qm_cqc_cfg(struct hisi_qp *qp) | |||
| struct hisi_qp *hisi_qm_create_qp(struct hisi_qm *qm, uint8_t sq_type) | |||
| { | |||
| struct hisi_qp *qp = NULL; | |||
| int cur_idx = 0; | |||
| uint32_t i; | |||
| else | ||
| qm->qp_idx++; | ||
| for (i = 0; i < qm->qp_num; i++) { | ||
| cur_idx = (qm->qp_dix + i) % qm->qp_num; |
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This won't even compile. Do you build and test properly before submitting code for review?
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Sorry, there are significant differences between our local code and the code in the library, so there are certain compilation issues. It is difficult to test now. After patches of qm, we will modify all the driver code according to the style of comments. During this, I will check my patch more carefully. Thanks!
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@jforissier I have modified my commit according to the comments. |
| qm->qp_idx = cur_idx + 1; | ||
| break; | ||
| } | ||
| } |
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panic if all used? or return NULL? This makes last tested index being used.
unlock/wait/relock, cond_var?
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This avoid all used case.
| qm->qp_idx = cur_idx + 1; | ||
| break; | ||
| } | ||
| } |
| qm->qp_idx++; | ||
| for (i = 0; i < qm->qp_num; i++) { | ||
| cur_idx = (qm->qp_idx + i) % qm->qp_num; | ||
| if (qm->qp_array[cur_idx].used == 0) { |
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prefer if (!qm->qp_array[cur_idx].used)
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| qp = &qm->qp_array[qm->qp_idx]; | ||
| qp = &qm->qp_array[cur_idx]; |
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could use qp = qm->qp_array + cur_idx;
…ame qp Flag in the qp structure is used to indicate whether the qp is occupied.The new task can find an unused qp and use it. Fixes: c7f9abc ("drivers: implement HiSilicon Queue Management (QM) module") Signed-off-by: Zexi Yu <yuzexi@hisilicon.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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@jforissier @etienne-lms All comments has been solved. |
Flag in the qp structure is used to indicate whether the qp is occupied.The new task can find an unused qp and use it.
Fixes: c7f9abc ("drivers: implement HiSilicon Queue Management (QM) module")