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About Jazelle

Sono edited this page Jun 3, 2021 · 2 revisions

Jazelle (or as officially called, Jazelle DBX, as in Direct Bytecode Execution) is what it says: a Java bytecode to ARM translator and support hardware, which can put itself on top of the ARM instruction decoder, add its own mechanics, and basically run hardware-accelerated Java bytecode!

...sort of.

Sadly Jazelle suffers from some implementation quirks which make it in most cases overall slower than just a JIT + a JVM. Most of the times the bottleneck is the switching overhead for when a Java instruction isn't implemented in hardware.

One great example is the IDIV (0x6C). Because most older ARM CPUs don't have the IDIV instruction implemented (they either use a dedicated fixed-function division hardware or a fast division routine), the Jazelle translator sees that this instruction can't be hardware-accelerated, so it jumps to the respective handler function defined in the handler array responsible for division.

Apart from the problem that software division takes a little bit longer to execute than hardware division could, it's a big overhead to load the address of the handler from r5, jump to it, then once the division is complete, push the result back on the stack, increment LR, setup r12, then do a BJX r12 to switch back to Java mode... it adds up if you're doing a lot of divmod in a loop.

There is (sadly only) a few upsides to Jazelle though:

  • some easy instructions are already implemented
  • it's very slightly faster than a completely interpreter-only JVM loop due to not having to have a switch-case statement and "long jumps"
  • ...?
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