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make blackblox issue #967
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RapidWright is unable to decrypt netlists and most IPs have their netlist encrypted. Thus, when you load a DCP back into Vivado from RapidWright, you often cannot simply reload the DCP from RapidWright, but you need to use the Tcl script that gets generated when encrypted IPs are detected. This way, the Tcl script is able to reassemble the encrypted portions back into the top level design. If this is not done, the IPs will look like black boxes. When you write out the DCP from RapidWright, do you see a message about using a Tcl script to load the design back into Vivado? The message may looks something like "...may contain encrypted cells. To correctly load the design into Vivado please source this Tcl script to open the checkpoint:..." |
Thanks Chris! Now I can successfully load the shell DCP. After load the shell DCP, I read back the DCP for the blackbox, read_checkpoint -cell <CELL_NAME> <BLACKBOX_SYNTH.dcp> and tried to place design. However, Vivado gives me another error: ERROR: [Common 17-53] User Exception: No open design. Please open an elaborated, synthesized or implemented design before executing this command. I guess Vivado is in non-project mode after read checkpoint, then how to open design? |
When you load the DCP from a Tcl script, Vivado will be in project mode. You can try writing out a new DCP after loading it via Tcl and then re-opening the newly written DCP in Vivado and try that to see if it alleviates the error message you are seeing. However, this error is puzzling and makes me think that either the wrong window was active when you ran the |
Thanks Chris! Writing out a new DCP after loading encrypted netlists via Tcl, it works. However, when I use the latest version,
Previously, I used |
Would you be able to provide an example design that triggers this error? It appears that it might be a bug and a test case would make it much easier to reproduce and diagnose. |
I uploaded my design post_route.dcp to Google drive. The command to reproduce this exception is:
|
Thanks, I have reproduced the issue and will starting working on a fix once we root cause the error. |
Signed-off-by: Chris Lavin <chris.lavin@amd.com>
I have created a fix for the issue, you can find it in #970. Let us know how it goes. |
Great! Let me try it. |
I'm using MakeBlackbox in my design following the tutorial Reuse Timing-closed Logic As A Shell
.
In my design, I use two hard IPs: XDMA and CMAC. However, after I cut several blackboxes from my logic, some modules of XDMA and CMAC become blackbox too, such as
udma_wrapper
,ram_top
,i_cmac_usplus_0_top
, as depicted in the attached pictures:How to avoid affecting IP modules when making blackboxes?
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