Using hand-mapping for resnet (#1412)

Xilinx · Apr 25, 2024 · 3929cec · 3929cec
1 parent a2e9a83
commit 3929cec
Show file tree

Hide file tree

Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/programming_examples/ml/resnet/layers_conv2_x/Makefile b/programming_examples/ml/resnet/layers_conv2_x/Makefile
@@ -12,9 +12,9 @@ mlirFileName = aie
 
 all: build/conv2dk1_i8.o build/conv2dk1_skip_init.o build/conv2dk3.o build/conv2dk1_skip.o build/conv2dk1_ui8.o build/final.xclbin
 
-build/${mlirFileName}.mlir: aie2.py
+build/${mlirFileName}.mlir: aie.mlir
 	mkdir -p ${@D}
-	python3 $< > $@
+	cp $< $@
 
 insts.txt: build/${mlirFileName}.mlir
 	aiecc.py -v --aie-only-generate-npu --npu-insts-name=$@ $<

diff --git a/programming_examples/ml/resnet/layers_conv2_x/test.py b/programming_examples/ml/resnet/layers_conv2_x/test.py
@@ -442,7 +442,7 @@ def forward(self, x):
     # ------------------------------------------------------
     for i in range(num_iter):
         start = time.time_ns()
-        aie_output = execute(app, ifm_mem_fmt, total_wts) * block_2_relu_3
+        aie_output = execute(app, ifm_mem_fmt, total_wts3) * block_2_relu_3
         stop = time.time_ns()
 
         if enable_trace: