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[aievec] add aievec.min/max e2e to-llvm tests (#1528)
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28 changes: 28 additions & 0 deletions
28
test/unit_tests/aievec_tests/i16xi16_max_elem/i16xi16_max_elem-llvm.mlir
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2024, Advanced Micro Devices, Inc. | ||
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||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=32" %vector-to-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
|
||
module { | ||
func.func @dut(%arg0: memref<1024xi16>, %arg1: memref<1024xi16>, %arg2: memref<1024xi16>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi16> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi16> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi16> | ||
%2 = arith.maxsi %0, %1 : i16 | ||
affine.store %2, %arg2[%arg3] : memref<1024xi16> | ||
} | ||
return | ||
} | ||
} |
10 changes: 7 additions & 3 deletions
10
test/unit_tests/aievec_tests/i16xi16_max_elem/i16xi16_max_elem.mlir
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28 changes: 28 additions & 0 deletions
28
test/unit_tests/aievec_tests/i16xi16_min_elem/i16xi16_min_elem-llvm.mlir
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Original file line number | Diff line number | Diff line change |
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2024, Advanced Micro Devices, Inc. | ||
|
||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=32" %vector-to-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
|
||
module { | ||
func.func @dut(%arg0: memref<1024xi16>, %arg1: memref<1024xi16>, %arg2: memref<1024xi16>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi16> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi16> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi16> | ||
%2 = arith.minsi %0, %1 : i16 | ||
affine.store %2, %arg2[%arg3] : memref<1024xi16> | ||
} | ||
return | ||
} | ||
} |
10 changes: 7 additions & 3 deletions
10
test/unit_tests/aievec_tests/i16xi16_min_elem/i16xi16_min_elem.mlir
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28 changes: 28 additions & 0 deletions
28
test/unit_tests/aievec_tests/i32xi32_max_elem/i32xi32_max_elem-llvm.mlir
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,28 @@ | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2024, Advanced Micro Devices, Inc. | ||
|
||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=16" %vector-to-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
|
||
module { | ||
func.func @dut(%arg0: memref<1024xi32>, %arg1: memref<1024xi32>, %arg2: memref<1024xi32>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi32> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi32> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi32> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi32> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi32> | ||
%2 = arith.maxsi %0, %1 : i32 | ||
affine.store %2, %arg2[%arg3] : memref<1024xi32> | ||
} | ||
return | ||
} | ||
} |
10 changes: 7 additions & 3 deletions
10
test/unit_tests/aievec_tests/i32xi32_max_elem/i32xi32_max_elem.mlir
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28 changes: 28 additions & 0 deletions
28
test/unit_tests/aievec_tests/i32xi32_min_elem/i32xi32_min_elem-llvm.mlir
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,28 @@ | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2024, Advanced Micro Devices, Inc. | ||
|
||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=16" %vector-to-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
|
||
module { | ||
func.func @dut(%arg0: memref<1024xi32>, %arg1: memref<1024xi32>, %arg2: memref<1024xi32>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi32> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi32> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi32> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi32> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi32> | ||
%2 = arith.minsi %0, %1 : i32 | ||
affine.store %2, %arg2[%arg3] : memref<1024xi32> | ||
} | ||
return | ||
} | ||
} |
10 changes: 7 additions & 3 deletions
10
test/unit_tests/aievec_tests/i32xi32_min_elem/i32xi32_min_elem.mlir
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