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Fixed segfault
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abisca committed Oct 30, 2024
1 parent f14f1b3 commit de08230
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Showing 2 changed files with 60 additions and 31 deletions.
6 changes: 3 additions & 3 deletions lib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -329,11 +329,11 @@ struct AIEObjectFifoStatefulTransformPass
}
} else {
// create corresponding aie2 locks
auto initValues = op.getInitValues().value();
auto initValues = op.getInitValues().has_value() ? op.getInitValues().value().size() : 0;
int prodLockID = lockAnalysis.getLockID(creation_tile);
assert(prodLockID >= 0 && "No more locks to allocate!");
auto prodLock = builder.create<LockOp>(
builder.getUnknownLoc(), creation_tile, prodLockID, numElem - initValues.size());
builder.getUnknownLoc(), creation_tile, prodLockID, numElem - initValues);
prodLock.getOperation()->setAttr(
SymbolTable::getSymbolAttrName(),
builder.getStringAttr(op.name().str() + "_prod_lock"));
Expand All @@ -342,7 +342,7 @@ struct AIEObjectFifoStatefulTransformPass
int consLockID = lockAnalysis.getLockID(creation_tile);
assert(consLockID >= 0 && "No more locks to allocate!");
auto consLock = builder.create<LockOp>(builder.getUnknownLoc(),
creation_tile, consLockID, initValues.size());
creation_tile, consLockID, initValues);
consLock.getOperation()->setAttr(
SymbolTable::getSymbolAttrName(),
builder.getStringAttr(op.name().str() + "_cons_lock"));
Expand Down
85 changes: 57 additions & 28 deletions test/objectFifo-stateful-transform/init_values_test.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -12,42 +12,71 @@

// CHECK: module @init {
// CHECK: aie.device(xcve2302) {
// CHECK: memref.global "public" @of0 : memref<3xi32>
// CHECK: memref.global "public" @of0_cons : memref<2x2xi32>
// CHECK: memref.global "public" @of0 : memref<2x2xi32>
// CHECK: %tile_1_2 = aie.tile(1, 2)
// CHECK: %tile_1_3 = aie.tile(1, 3)
// CHECK: %of0_buff_0 = aie.buffer(%tile_1_2) {sym_name = "of0_buff_0"} : memref<3xi32> = dense<[0, 1, 2]>
// CHECK: %of0_buff_1 = aie.buffer(%tile_1_2) {sym_name = "of0_buff_1"} : memref<3xi32> = dense<[3, 4, 5]>
// CHECK: %tile_2_3 = aie.tile(2, 3)
// CHECK: %of0_cons_buff_0 = aie.buffer(%tile_2_3) {sym_name = "of0_cons_buff_0"} : memref<2x2xi32>
// CHECK: %of0_cons_buff_1 = aie.buffer(%tile_2_3) {sym_name = "of0_cons_buff_1"} : memref<2x2xi32>
// CHECK: %of0_cons_buff_2 = aie.buffer(%tile_2_3) {sym_name = "of0_cons_buff_2"} : memref<2x2xi32>
// CHECK: %of0_cons_prod_lock = aie.lock(%tile_2_3, 0) {init = 3 : i32, sym_name = "of0_cons_prod_lock"}
// CHECK: %of0_cons_cons_lock = aie.lock(%tile_2_3, 1) {init = 0 : i32, sym_name = "of0_cons_cons_lock"}
// CHECK: %of0_buff_0 = aie.buffer(%tile_1_2) {sym_name = "of0_buff_0"} : memref<2x2xi32> = dense<[[0, 1], [2, 3]]>
// CHECK: %of0_buff_1 = aie.buffer(%tile_1_2) {sym_name = "of0_buff_1"} : memref<2x2xi32> = dense<[[4, 5], [6, 7]]>
// CHECK: %of0_buff_2 = aie.buffer(%tile_1_2) {sym_name = "of0_buff_2"} : memref<2x2xi32> = dense<[[8, 9], [10, 11]]>
// CHECK: %of0_prod_lock = aie.lock(%tile_1_2, 0) {init = 0 : i32, sym_name = "of0_prod_lock"}
// CHECK: %of0_cons_lock = aie.lock(%tile_1_2, 1) {init = 2 : i32, sym_name = "of0_cons_lock"}
// CHECK: }
// CHECK: aie.device(xcvc1902) {
// CHECK: memref.global "public" @of3 : memref<2xi32>
// CHECK: %tile_1_2 = aie.tile(1, 2)
// CHECK: %tile_1_3 = aie.tile(1, 3)
// CHECK: %of2_buff_0 = aie.buffer(%tile_1_2) {sym_name = "of2_buff_0"} : memref<2xi32> = dense<[0, 1]>
// CHECK: %of2_buff_1 = aie.buffer(%tile_1_2) {sym_name = "of2_buff_1"} : memref<2xi32> = dense<[3, 4]>
// CHECK: %of2_lock_0 = aie.lock(%tile_1_2, 0) {init = 1 : i32, sym_name = "of2_lock_0"}
// CHECK: %of2_lock_1 = aie.lock(%tile_1_2, 1) {init = 1 : i32, sym_name = "of2_lock_1"}
// CHECK: %of0_cons_lock = aie.lock(%tile_1_2, 1) {init = 3 : i32, sym_name = "of0_cons_lock"}
// CHECK: aie.flow(%tile_1_2, DMA : 0, %tile_2_3, DMA : 0)
// CHECK: %mem_1_2 = aie.mem(%tile_1_2) {
// CHECK: %0 = aie.dma_start(MM2S, 0, ^bb1, ^bb4)
// CHECK: ^bb1: // 2 preds: ^bb0, ^bb3
// CHECK: aie.use_lock(%of0_cons_lock, AcquireGreaterEqual, 1)
// CHECK: aie.dma_bd(%of0_buff_0 : memref<2x2xi32>, 0, 4)
// CHECK: aie.use_lock(%of0_prod_lock, Release, 1)
// CHECK: aie.next_bd ^bb2
// CHECK: ^bb2: // pred: ^bb1
// CHECK: aie.use_lock(%of0_cons_lock, AcquireGreaterEqual, 1)
// CHECK: aie.dma_bd(%of0_buff_1 : memref<2x2xi32>, 0, 4)
// CHECK: aie.use_lock(%of0_prod_lock, Release, 1)
// CHECK: aie.next_bd ^bb3
// CHECK: ^bb3: // pred: ^bb2
// CHECK: aie.use_lock(%of0_cons_lock, AcquireGreaterEqual, 1)
// CHECK: aie.dma_bd(%of0_buff_2 : memref<2x2xi32>, 0, 4)
// CHECK: aie.use_lock(%of0_prod_lock, Release, 1)
// CHECK: aie.next_bd ^bb1
// CHECK: ^bb4: // pred: ^bb0
// CHECK: aie.end
// CHECK: }
// CHECK: %mem_2_3 = aie.mem(%tile_2_3) {
// CHECK: %0 = aie.dma_start(S2MM, 0, ^bb1, ^bb4)
// CHECK: ^bb1: // 2 preds: ^bb0, ^bb3
// CHECK: aie.use_lock(%of0_cons_prod_lock, AcquireGreaterEqual, 1)
// CHECK: aie.dma_bd(%of0_cons_buff_0 : memref<2x2xi32>, 0, 4)
// CHECK: aie.use_lock(%of0_cons_cons_lock, Release, 1)
// CHECK: aie.next_bd ^bb2
// CHECK: ^bb2: // pred: ^bb1
// CHECK: aie.use_lock(%of0_cons_prod_lock, AcquireGreaterEqual, 1)
// CHECK: aie.dma_bd(%of0_cons_buff_1 : memref<2x2xi32>, 0, 4)
// CHECK: aie.use_lock(%of0_cons_cons_lock, Release, 1)
// CHECK: aie.next_bd ^bb3
// CHECK: ^bb3: // pred: ^bb2
// CHECK: aie.use_lock(%of0_cons_prod_lock, AcquireGreaterEqual, 1)
// CHECK: aie.dma_bd(%of0_cons_buff_2 : memref<2x2xi32>, 0, 4)
// CHECK: aie.use_lock(%of0_cons_cons_lock, Release, 1)
// CHECK: aie.next_bd ^bb1
// CHECK: ^bb4: // pred: ^bb0
// CHECK: aie.end
// CHECK: }
// CHECK: }
// CHECK: }

module @init {
aie.device(xcve2302) {
%tile12 = aie.tile(1, 2)
%tile13 = aie.tile(1, 3)
%tile23 = aie.tile(2, 3)

aie.objectfifo @of0 (%tile12, {%tile13}, 2 : i32) : !aie.objectfifo<memref<3xi32>> = [[0, 1, 2], [3, 4, 5]]
aie.objectfifo @of0 (%tile12, {%tile23}, 3 : i32) : !aie.objectfifo<memref<2x2xi32>> = [dense<[[0, 1], [2, 3]]> : memref<2x2xi32>,
dense<[[4, 5], [6, 7]]> : memref<2x2xi32>,
dense<[[8, 9], [10, 11]]> : memref<2x2xi32>]
}
// aie.device(xcve2302) {
// %tile12 = aie.tile(1, 2)
// %tile13 = aie.tile(1, 3)

// aie.objectfifo @of1 (%tile12, {%tile13}, 2 : i32) : !aie.objectfifo<memref<2x2xi32>> = dense<[[[0, 1], [2, 3]], [[4, 5], [6, 7]]]>
// }
// aie.device(xcvc1902) {
// %tile12 = aie.tile(1, 2)
// %tile13 = aie.tile(1, 3)

// aie.objectfifo @of2 (%tile12, {%tile13}, 2 : i32) : !aie.objectfifo<memref<2xi32>> = [dense<[0, 1]>, dense<[3, 4]>]
// }
}

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