[aievec] Add AIEml intrinsic for matmul ops #684

jsetoain · 2023-10-18T11:14:12Z

No description provided.

david-vc

@jsetoain : I request to generalize the new Operation so that it can model all matmul configs that the architecture supports. Thanks.

david-vc · 2023-10-18T15:45:16Z

include/aie/Dialect/AIEVec/IR/AIEVecOps.td

+    Pure,
+    AllTypesMatch<["acc", "result"]>
+  ]>,
+  Arguments<(ins VectorOfShapeAndType<[4, 8], BF16>:$lhs,


@jsetoain : I request to generalize this so that it can model all matmul configurations that are not convolutions, element-wise, or sparse.

david-vc

This is the first AIEVec op that requires its operands to be 2-dimensional. I think this direction is worth pursuing.

test/dialect/AIEVec/roundtrip.mlir

jamestcl-amd · 2023-10-26T02:49:46Z

include/aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td

+include "mlir/IR/BuiltinTypes.td"
+include "mlir/IR/OpBase.td"
+
+def I4  : I<4>;


Just curious, so only I4 needs to be defined at here?

Yes, I8/I16/I32/I64 are all defined in "mlir/IR/OpBase.d" (moved somewhere else in the latest mlir, by the way)

jamestcl-amd · 2023-10-26T02:51:29Z

include/aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td

+class IsValidAIE2MatMulShapeAndType<string lhs, string rhs, string acc> :
+  PredOpTrait<lhs # " x " # rhs # " = " # acc # " is a valid AIE2 " #
+              "matrix-multiply and accumulate op",
+              Or<[VectorTypesMatch<lhs, AIE2MatMulOperand_4x16xi8,


These checks and constraints look so nice!

david-vc · 2023-11-07T16:57:33Z

include/aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td

+
+// Notice: These predicate definitions assume that the type has been verified to
+//         be a ShapedType
+def AIE2MatMulOperand_4x16xi8  : VectorOfShapeAndType<[4, 16], I8>;


Down the road we may support multiple architecture variants, all in the family "AIE", but the numeric suffix may be different. So my suggestion is to drop AIE2 from the name.

Yea I agree, something like SmallMatrix... maybe.

makslevental

LGTM (just some curious questions).

makslevental · 2023-11-07T18:19:41Z

include/aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td

+
+// Notice: These predicate definitions assume that the type has been verified to
+//         be a ShapedType
+def AIE2MatMulOperand_4x16xi8  : VectorOfShapeAndType<[4, 16], I8>;


Yea I agree, something like SmallMatrix... maybe.

makslevental · 2023-11-07T18:20:07Z

include/aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td

+def AIE2MatMulOperand_16x8xi4  : VectorOfShapeAndType<[16, 8], I4>;
+def AIE2MatMulOperand_8x8xi8   : VectorOfShapeAndType<[8, 8], I8>;
+def AIE2MatMulOperand_8x4xi8   : VectorOfShapeAndType<[8, 4], I8>;
+def AIE2MatMulOperand_8x4xbf16 : VectorOfShapeAndType<[8, 4], BF16>;


Is there a reason not to just "forward" the VectorOfShapeAndType<...> to the use site? I.e., I'm asking can't you use VectorOfShapeAndType<[4, 8], BF16> in the type constraint below?

Progressive refinement. I used to have them separated by lhs/rhs/acc even, but it's true that at this point I might as well remove the "alias".

makslevental · 2023-11-07T18:23:10Z

include/aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td

+class ShapeDimsMatch<string lhs, int ld, string rhs, int rd> :
+  CPred<Shape<lhs>.result # "[" # ld # "] == " #
+        Shape<rhs>.result # "[" # rd # "]">;


I thought this existed upstream but I can't find it - good stuff for upstreaming!

Not this one, but you just reminded me that "VectorOfShape" does exist in newer versions of MLIR (we were stuck in an old one for quite some time), I should get rid of that one.

makslevental · 2023-11-07T18:23:50Z

include/aie/Dialect/AIEVec/IR/CMakeLists.txt

@@ -6,4 +6,4 @@
 # (c) Copyright 2022 Xilinx Inc.

 add_mlir_dialect(AIEVecOps aievec)
-add_mlir_doc(AIEVecOps AIEVecDialect ./ -gen-dialect-doc)
+add_mlir_doc(AIEVecOps AIEVecDialect ./ -gen-dialect-doc -dialect=aievec)


Gonna have a collision when you rebase :)

I know, but it wouldn't pass CI otherwise :-)

jsetoain requested review from stephenneuendorffer, david-vc, linay-xsj and jamestcl-amd October 18, 2023 11:14

david-vc requested changes Oct 18, 2023

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jsetoain force-pushed the add-bf16-matmul-intrinsic branch from 52c1674 to a21e29e Compare October 19, 2023 16:41

jsetoain requested a review from david-vc October 19, 2023 16:41

jsetoain changed the title ~~[aievec] Add AIEml intrinsic for bf16/f32 types~~ [aievec] Add AIEml intrinsic for matmul ops Oct 19, 2023

jsetoain force-pushed the add-bf16-matmul-intrinsic branch 2 times, most recently from c349f56 to 837e08a Compare October 20, 2023 10:06

stephenneuendorffer changed the base branch from vitis2023_2 to main October 23, 2023 18:27

jsetoain force-pushed the add-bf16-matmul-intrinsic branch from 837e08a to 796483d Compare October 25, 2023 16:34

david-vc reviewed Oct 25, 2023

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jamestcl-amd reviewed Oct 26, 2023

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jamestcl-amd mentioned this pull request Oct 26, 2023

Add bf16 matmul llvm conversion #686

Closed

jsetoain force-pushed the add-bf16-matmul-intrinsic branch 2 times, most recently from fc2451c to 260edb9 Compare November 2, 2023 19:38

jsetoain requested a review from david-vc November 6, 2023 17:32

jsetoain force-pushed the add-bf16-matmul-intrinsic branch 3 times, most recently from a622e0d to 4dd1644 Compare November 7, 2023 14:35

jsetoain requested a review from makslevental November 7, 2023 14:37

david-vc approved these changes Nov 7, 2023

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makslevental reviewed Nov 7, 2023

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jsetoain force-pushed the add-bf16-matmul-intrinsic branch from 4dd1644 to 0a91926 Compare November 8, 2023 12:11

[aievec] Add AIEml intrinsic for bf16/f32 types

06c3e60

jsetoain force-pushed the add-bf16-matmul-intrinsic branch from 0a91926 to 06c3e60 Compare November 8, 2023 12:21

jsetoain merged commit 7114fb1 into Xilinx:main Nov 8, 2023
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[aievec] Add AIEml intrinsic for matmul ops #684

[aievec] Add AIEml intrinsic for matmul ops #684

jsetoain commented Oct 18, 2023

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[aievec] Add AIEml intrinsic for matmul ops #684

[aievec] Add AIEml intrinsic for matmul ops #684

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jsetoain commented Oct 18, 2023

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