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cirofabianbermudez/README.md

Hi 👋, I'm Ciro

Web page · Email · LinkedIn

Electronic engineer from Puebla, México

cirofabianbermudez profile views

  • 🌱 I’m currently learning IC design and FPGAs.
  • 💬 Ask me about C, MATLAB, Python, Verilog, VHDL, Electronic Circuits.
  • 📫 How to reach me: @CiroBermudez.
  • ⚡ Fun fact: XD

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  1. cordic_ip cordic_ip Public

    CORDIC ip FPGA verilog/systemverilog

    SystemVerilog

  2. vip vip Public

    Verification IPs (VIP)

    SystemVerilog

  3. uart_ip uart_ip Public

    UART ip FPGA verilog/systemverilog

    Tcl

  4. i2c_ip i2c_ip Public

    I2C ip FPGA verilog/systemverilog

    SystemVerilog 1

  5. curso_fpga curso_fpga Public

    Códigos de verilog, plantillas y proyectos terminados

    Verilog 1 1

  6. spi_ip spi_ip Public

    SPI ip FPGA verilog/systemverilog