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core: riscv: Disable traps by clearing XIE CSR #612

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core: riscv: Disable traps by clearing XIE CSR

core: riscv: Disable traps by clearing XIE CSR #612

Triggered via push October 14, 2024 07:17
@gagachanggagachang
pushed 17802aa
dev-riscv-improve-20241014
Status Success
Total duration 38m 17s
Artifacts –

ci.yml

on: push
Code style
1m 2s
Code style
make (multi-platform)
19m 32s
make (multi-platform)
make check (QEMUv7)
33m 12s
make check (QEMUv7)
make check (QEMUv8)
38m 5s
make check (QEMUv8)
make check (QEMUv8, Clang)
14m 16s
make check (QEMUv8, Clang)
make check (QEMUv8, Xen)
23m 34s
make check (QEMUv8, Xen)
make check (QEMUv8, Xen FF-A)
24m 22s
make check (QEMUv8, Xen FF-A)
make check (QEMUv8, Hafnium)
20m 23s
make check (QEMUv8, Hafnium)
make check (QEMUv8, BTI+MTE+PAC)
18m 19s
make check (QEMUv8, BTI+MTE+PAC)
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