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riscv: plat-virt: allow enabling CFG_TEE_CORE_DEBUG for virt machine
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Allow enabling CFG_TEE_CORE_DEBUG to make assertions useful.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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@lyctw @jforissier
lyctw authored and jforissier committed Sep 16, 2024
1 parent 1502e43 commit 16b9b1e
Showing 1 changed file with 0 additions and 1 deletion.
1 change: 0 additions & 1 deletion core/arch/riscv/plat-virt/conf.mk
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Expand Up @@ -5,7 +5,6 @@ $(call force,CFG_RISCV_ISA_C,y)
$(call force,CFG_RISCV_FPU,y)

$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
$(call force,CFG_TEE_CORE_DEBUG,n)
$(call force,CFG_CORE_RESERVED_SHM,n)
$(call force,CFG_CORE_DYN_SHM,y)

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