riscv: virt: Relax the configurations related to hart/thread number

Do not force the CFG_TEE_CORE_NB_CORE and CFG_NUM_THREADS to be 1, since
we may run SMP system which has multiple harts and threads.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

core/arch/riscv/plat-virt/conf.mk

@@ -13,8 +13,8 @@ $(call force,CFG_WITH_STACK_CANARIES,n)
 $(call force,CFG_CORE_SANITIZE_KADDRESS,n)
 
 # Hart-related flags
-$(call force,CFG_TEE_CORE_NB_CORE,1)
-$(call force,CFG_NUM_THREADS,1)
+CFG_TEE_CORE_NB_CORE ?= 1
+CFG_NUM_THREADS ?= 1
 $(call force,CFG_BOOT_SYNC_CPU,y)
 
 # RISC-V-specific flags