plat-stm32mp1: pager use SYSRAM last page if possible

Update stm32mp1 with pager TZSRAM size to use SYSRAM last page
now that pager implementation issue pager pageable boundary is
addressed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

core/arch/arm/plat-stm32mp1/conf.mk

@@ -201,6 +201,7 @@ CFG_DRAM_SIZE    ?= 0x40000000
 CFG_STM32MP1_SCMI_SHM_SYSRAM ?= n
 ifeq ($(CFG_STM32MP1_SCMI_SHM_SYSRAM),y)
 $(call force,CFG_STM32MP1_SCMI_SHM_BASE,0x2ffff000)
+CFG_TZSRAM_SIZE  ?= 0x0003f000
 else
 CFG_STM32MP1_SCMI_SHM_BASE ?= 0
 endif
@@ -214,7 +215,7 @@ else
 CFG_TZDRAM_SIZE  ?= 0x02000000
 endif
 CFG_TZSRAM_START ?= 0x2ffc0000
-CFG_TZSRAM_SIZE  ?= 0x0003f000
+CFG_TZSRAM_SIZE  ?= 0x00040000
 ifeq ($(CFG_CORE_RESERVED_SHM),y)
 CFG_SHMEM_START  ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
 CFG_SHMEM_SIZE   ?= ($(CFG_DRAM_BASE) + $(CFG_DRAM_SIZE) - $(CFG_SHMEM_START))