core: riscv: Set exception return PC into XEPC instead of ra

Instead of setting exception return PC into "ra" register and assign it
to XEPC, we should directly set exception return PC into "XEPC" CSR to
improve code redability.

Signed-off-by: Alvin Chang <alvinga@andestech.com>

core/arch/riscv/kernel/thread_arch.c

@@ -503,7 +503,7 @@ static void set_ctx_regs(struct thread_ctx_regs *regs, unsigned long a0,
 		.a3 = a3,
 		.s0 = 0,
 		.sp = user_sp,
-		.ra = entry_func,
+		.epc = entry_func,
 		.status = status,
 		.ie = ie,
 	};

core/arch/riscv/kernel/thread_rv.S

@@ -606,11 +606,12 @@ FUNC __thread_enter_user_mode , :
 	/* Set user ie */
 	load_xregs a0, THREAD_CTX_REG_IE, REG_S0
 	csrw	CSR_XIE, s0
-
 	/* Set user status */
 	load_xregs a0, THREAD_CTX_REG_STATUS, REG_S0
 	csrw	CSR_XSTATUS, s0
-
+	/* Set exception program counter */
+	load_xregs a0, THREAD_CTX_REG_EPC, REG_S0
+	csrw	CSR_XEPC, s0
 	/* Load the rest of the general purpose registers */
 	load_xregs a0, THREAD_CTX_REG_RA, REG_RA, REG_TP
 	load_xregs a0, THREAD_CTX_REG_T0, REG_T0, REG_T2
@@ -619,9 +620,6 @@ FUNC __thread_enter_user_mode , :
 	load_xregs a0, THREAD_CTX_REG_T3, REG_T3, REG_T6
 	load_xregs a0, THREAD_CTX_REG_A0, REG_A0, REG_A7
 
-	/* Set exception program counter */
-	csrw		CSR_XEPC, ra
-
 	/* Jump into user mode */
 	XRET
 END_FUNC __thread_enter_user_mode