core: riscv: Do not restrict primary hart to hart ID 0 only

The ID of primary hart should not be restricted to zero. Thus,
determining primary hart and secondart harts by zero hart ID is not
feasible.

We refer to RISC-V linux kernel [1] to fix this issue, by adding a
"hart_lottery" variable. The first hart who enters OP-TEE will win the
lottery, atomically increment this variable, and be the primary hart.
Other harts enter OP-TEE later won't win the lottery, so they execute
the secondary boot sequence.

[1]:
https://github.com/torvalds/linux/blob/v6.7/arch/riscv/kernel/head.S#L244

Signed-off-by: Alvin Chang <alvinga@andestech.com>

core/arch/riscv/kernel/entry.S

@@ -148,7 +148,12 @@ FUNC _start , :
 #else
 	mv	s1, a1		/* Save device tree address into s1 */
 #endif
-	bnez	a0, reset_secondary
+
+	/* Only first hart who wins lottery runs the primary boot sequence. */
+	la	a3, hart_lottery
+	li	a2, 1
+	amoadd.w a3, a2, (a3)
+	bnez	a3, reset_secondary
 	jal	reset_primary
 	j	.
 END_FUNC _start
@@ -246,6 +251,13 @@ LOCAL_FUNC unhandled_cpu , :
 	j	unhandled_cpu
 END_FUNC unhandled_cpu
 
+	.section .identity_map.data
+	.balign	8
+LOCAL_DATA hart_lottery , :
+	/* The hart who first increments this variable will be primary hart. */
+	.word	0
+END_DATA hart_lottery
+
 #ifdef CFG_BOOT_SYNC_CPU
 LOCAL_DATA sem_cpu_sync_start , :
 	.word	sem_cpu_sync