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core: riscv: Support fault mitigations in non-threaded code
The commit ce56605 ("core: support fault mitigations in non-threaded code) supports fault mitigations in non-threaded code for ARM architecture. This commit adds the related modification for RISC-V architecture to support it too. Also the indentation in __ftmn_get_tsd_func_arg_pp() is fixed. Signed-off-by: Alvin Chang <alvinga@andestech.com>
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