hpm_sdk release v1.0.0

Main changes since 0.14.0

Tested Segger Embedded Studio Version: 7.10

- Changed:
  - boards: add version info in banner.
  - board: lcdc: move panel para to board
  - components: spi component to support to transfer different width of data in dma handshake mode
  - drivers: rename dram to femc
  - middleware: cherryusb update to v0.7.0
  - middleware: erpc: update for support rtos
  - middleware: hpm_mcl: update api naming
  - samples: erpc: rename erpc_matrix_multiply_rpmsg to erpc_matrix_multiply_rpmsg_bm
  - samples: erpc: reorganize erpc_matrix_multiply_rpmsg samples
  - samples: erpc: move samples folder to erpc_matrix_multiply_rpmsg
  - samples: update i2c/spi dma channel and dmamux channel definition
  - ses: project template: use demo.* as output file naming.
  - soc: HPM6750: toolchains: update linker files
  - soc: HPM6360: toolchains: update linker files

- Added:
  - arch: riscv: add read_clear_csr() API
  - component: add wm8960 support
  - component: add usb device iso transfer support
  - drivers: hpm_common: include hpm_sdk_version.h.
  - drivers: common: add NOP and WFI.
  - drivers: uart: add api to recv/send byte directly.
  - soc: HPM6750 linker files: rename rpmsg_sh_mem to sh_mem
  - cmake: add sdk version header file generation.
  - middleware: tinyusb: add audio class
  - middleware: hpm_math: add NN library
  - samples: erpc: add erpc_two_way_rpc_rpmsg_rtos sample
  - samples: erpc: add erpc_matrix_multiply_rpmsg_rtos sample
  - samples: add power mode switch demo. #282
  - samples: drivers: adc: add a temperature measurement demo
  - samples: drviers: femc: add sram sample
  - samples: lwip demo for FreeRTOS
  - samples: lwip demo of interrupt usage
  - samples: tinyusb: add uac2 demo
  - samples: tflm: add face detection demo
  - samples: tflm: add MLPerf Tiny benchmark demo
  - samples: lwip: common: feature: add a LPI interrupt process

- Fixed:
  - drivers:interrupt: Fix FPU context crashing in nested irq case
  - drivers: src: adc: fix adc result in period mode
  - segger: update app directory structure in SES.
  - soc: disable irq during cache maintenance
  - middleware: lvgl: fps calculation to No.
  - samples: get off level based on board api.
  - samples: multicore: hello: core1 rgb led does not change correctly.

Signed-off-by: Ryan QIAN <jianghao.qian@hpmicro.com>

CHANGELOG.md

@@ -1,5 +1,59 @@
 # Change Log
 
+## [1.00.0] - 2022-12-31:
+
+Main changes since 0.14.0
+
+Tested Segger Embedded Studio Version: 7.10
+
+### Changed:
+  - boards: add version info in banner.
+  - board: lcdc: move panel para to board
+  - components: spi component to support to transfer different width of data in dma handshake mode
+  - drivers: rename dram to femc
+  - middleware: cherryusb update to v0.7.0
+  - middleware: erpc: update for support rtos
+  - middleware: hpm_mcl: update api naming
+  - samples: erpc: rename erpc_matrix_multiply_rpmsg to erpc_matrix_multiply_rpmsg_bm
+  - samples: erpc: reorganize erpc_matrix_multiply_rpmsg samples
+  - samples: erpc: move samples folder to erpc_matrix_multiply_rpmsg
+  - samples: update i2c/spi dma channel and dmamux channel definition
+  - ses: project template: use demo.* as output file naming.
+  - soc: HPM6750: toolchains: update linker files
+  - soc: HPM6360: toolchains: update linker files
+
+### Added:
+  - arch: riscv: add read_clear_csr() API
+  - component: add wm8960 support
+  - component: add usb device iso transfer support
+  - drivers: hpm_common: include hpm_sdk_version.h.
+  - drivers: common: add NOP and WFI.
+  - drivers: uart: add api to recv/send byte directly.
+  - soc: HPM6750 linker files: rename rpmsg_sh_mem to sh_mem
+  - cmake: add sdk version header file generation.
+  - middleware: tinyusb: add audio class
+  - middleware: hpm_math: add NN library
+  - samples: erpc: add erpc_two_way_rpc_rpmsg_rtos sample
+  - samples: erpc: add erpc_matrix_multiply_rpmsg_rtos sample
+  - samples: add power mode switch demo. #282
+  - samples: drivers: adc: add a temperature measurement demo
+  - samples: drviers: femc: add sram sample
+  - samples: lwip demo for FreeRTOS
+  - samples: lwip demo of interrupt usage
+  - samples: tinyusb: add uac2 demo
+  - samples: tflm: add face detection demo
+  - samples: tflm: add MLPerf Tiny benchmark demo
+  - samples: lwip: common: feature: add a LPI interrupt process
+
+### Fixed:
+  - drivers:interrupt: Fix FPU context crashing in nested irq case
+  - drivers: src: adc: fix adc result in period mode
+  - segger: update app directory structure in SES.
+  - soc: disable irq during cache maintenance
+  - middleware: lvgl: fps calculation to No.
+  - samples: get off level based on board api.
+  - samples: multicore: hello: core1 rgb led does not change correctly.
+
 ## [0.14.0] - 2022-10-31:
 
 Main changes since 0.13.0

CMakeLists.txt

@@ -157,6 +157,15 @@ file(WRITE ${EMPTY_FILE} "")
 
 add_executable(${APP_ELF_NAME} ${EMPTY_FILE})
 
+# generate SDK version file
+execute_process(
+  COMMAND ${CMAKE_COMMAND} -DHPM_SDK_BASE=${HPM_SDK_BASE}
+    -DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/hpm_sdk_version.h
+    -P ${HPM_SDK_BASE}/cmake/gen_version_h.cmake
+  WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
+)
+sdk_inc(${PROJECT_BINARY_DIR}/include/generated/)
+
 set_target_properties(${APP_ELF_NAME} PROPERTIES LINK_DEPENDS ${LINKER_SCRIPT})
 
 if("${TOOLCHAIN_VARIANT}" STREQUAL "nds-gcc")

VERSION

@@ -1,5 +1,5 @@
-VERSION_MAJOR = 0
-VERSION_MINOR = 14
+VERSION_MAJOR = 1
+VERSION_MINOR = 0
 PATCHLEVEL = 0
 VERSION_TWEAK = 0
 EXTRAVERSION = 0

arch/riscv/riscv_core.h

@@ -29,6 +29,16 @@ extern "C" {
  */
 #define clear_csr(csr_num, bit) __asm volatile("csrc %0, %1" : : "i"(csr_num), "r"(bit))
 
+/**
+ * @brief read and clear bits in csr
+ *
+ * @param csr_num specific csr
+ * @param bit bits to be cleared
+ *
+ * @return csr value before cleared
+ */
+#define read_clear_csr(csr_num, bit) ({ uint32_t v; __asm volatile("csrrc %0, %1, %2" : "=r"(v) : "i"(csr_num), "r"(bit)); v; })
+
 /**
  * @brief set bits in csr
  *

boards/hpm6300evk/README.md

@@ -86,4 +86,11 @@ Board overall hpm6300evk
 
 | Function | Position |
 | -------- | -------- |
-| DCA0.OUT | J26[11]  |
+| DAC0.OUT | J26[11]  |
+
+- PWM Pin
+
+| Function | Position |
+| -------- | -------- |
+| PWM2.P0 | J26[14]  |
+| PWM2.P1 | J26[13]  |

boards/hpm6300evk/README_zh.md

@@ -79,5 +79,12 @@
 
 | 功能     | 位置    |
 | -------- | ------- |
-| DCA0.OUT | J26[11] |
+| DAC0.OUT | J26[11] |
+
+- PWM引脚
+
+| 功能     | 位置    |
+| -------- | -------- |
+| PWM2.P0 | J26[14]  |
+| PWM2.P1 | J26[13]  |
 

boards/hpm6300evk/board.c

@@ -10,7 +10,7 @@
 #include "hpm_lcdc_drv.h"
 #include "hpm_i2c_drv.h"
 #include "hpm_gpio_drv.h"
-#include "hpm_dram_drv.h"
+#include "hpm_femc_drv.h"
 #include "pinmux.h"
 #include "hpm_pmp_drv.h"
 #include "assert.h"
@@ -129,7 +129,7 @@ void board_print_clock_freq(void)
     printf("mchtmr0:\t %luHz\n", clock_get_frequency(clock_mchtmr0));
     printf("xpi0:\t\t %luHz\n", clock_get_frequency(clock_xpi0));
     printf("xpi1:\t\t %luHz\n", clock_get_frequency(clock_xpi1));
-    printf("dram:\t\t %luHz\n", clock_get_frequency(clock_dram));
+    printf("femc:\t\t %luHz\n", clock_get_frequency(clock_femc));
     printf("==============================\n");
 }
 
@@ -156,6 +156,9 @@ void board_print_banner(void)
 $$ |  $$ |$$ |      $$ | \\_/ $$ |$$ |\\$$$$$$$\\ $$ |      \\$$$$$$  |\n\
 \\__|  \\__|\\__|      \\__|     \\__|\\__| \\_______|\\__|       \\______/\n\
 ----------------------------------------------------------------------\n"};
+#ifdef SDK_VERSION_STRING
+    printf("hpm_sdk: %s\n", SDK_VERSION_STRING);
+#endif
     printf("%s", banner);
 }
 
@@ -185,13 +188,13 @@ void board_init_sdram_pins(void)
     init_sdram_pins();
 }
 
-uint32_t board_init_dram_clock(void)
+uint32_t board_init_femc_clock(void)
 {
-    clock_add_to_group(clock_dram, 0);
-    /* Configure the SDRAM to 133MHz */
-    clock_set_source_divider(clock_dram, clk_src_pll0_clk1, 2U);
+    clock_add_to_group(clock_femc, 0);
+    /* Configure the SDRAM to 166MHz */
+    clock_set_source_divider(clock_femc, clk_src_pll0_clk1, 2U);
 
-    return clock_get_frequency(clock_dram);
+    return clock_get_frequency(clock_femc);
 }
 
 void board_delay_us(uint32_t us)
@@ -246,7 +249,7 @@ uint32_t board_init_spi_clock(SPI_Type *ptr)
     if (ptr == HPM_SPI3) {
         /* SPI3 clock configure */
         clock_add_to_group(clock_spi3, 0);
-        clock_set_source_divider(clock_spi3, clk_src_osc24m, 1U);
+        clock_set_source_divider(clock_spi3, clk_src_pll0_clk0, 5U); /* 80MHz */
 
         return clock_get_frequency(clock_spi3);
     }
@@ -275,10 +278,15 @@ void board_write_spi_cs(uint32_t pin, uint8_t state)
     gpio_write_pin(BOARD_SPI_CS_GPIO_CTRL, GPIO_GET_PORT_INDEX(pin), GPIO_GET_PIN_INDEX(pin), state);
 }
 
+uint8_t board_get_led_gpio_off_level(void)
+{
+    return BOARD_LED_OFF_LEVEL;
+}
+
 void board_init_led_pins(void)
 {
     init_led_pins();
-    gpio_set_pin_output(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN);
+    gpio_set_pin_output_with_initial(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN, board_get_led_gpio_off_level());
 }
 
 void board_led_toggle(void)
@@ -360,7 +368,7 @@ void board_init_clock(void)
     clock_add_to_group(clock_axis, 0);
 
     clock_add_to_group(clock_mchtmr0, 0);
-    clock_add_to_group(clock_dram, 0);
+    clock_add_to_group(clock_femc, 0);
     clock_add_to_group(clock_xpi0, 0);
     clock_add_to_group(clock_xpi1, 0);
     clock_add_to_group(clock_gptmr0, 0);
@@ -539,23 +547,23 @@ uint32_t board_init_can_clock(CAN_Type *ptr)
  */
 void _init_ext_ram(void)
 {
-    uint32_t dram_clk_in_hz;
+    uint32_t femc_clk_in_hz;
     board_init_sdram_pins();
-    dram_clk_in_hz = board_init_dram_clock();
+    femc_clk_in_hz = board_init_femc_clock();
 
-    dram_config_t config = {0};
-    dram_sdram_config_t sdram_config = {0};
+    femc_config_t config = {0};
+    femc_sdram_config_t sdram_config = {0};
 
-    dram_default_config(HPM_DRAM, &config);
-    config.dqs = DRAM_DQS_INTERNAL;
-    dram_init(HPM_DRAM, &config);
+    femc_default_config(HPM_FEMC, &config);
+    config.dqs = FEMC_DQS_INTERNAL;
+    femc_init(HPM_FEMC, &config);
 
-    sdram_config.bank_num = DRAM_SDRAM_BANK_NUM_4;
+    sdram_config.bank_num = FEMC_SDRAM_BANK_NUM_4;
     sdram_config.prescaler = 0x3;
     sdram_config.burst_len_in_byte = 8;
     sdram_config.auto_refresh_count_in_one_burst = 1;
-    sdram_config.col_addr_bits = DRAM_SDRAM_COLUMN_ADDR_9_BITS;
-    sdram_config.cas_latency = DRAM_SDRAM_CAS_LATENCY_3;
+    sdram_config.col_addr_bits = FEMC_SDRAM_COLUMN_ADDR_9_BITS;
+    sdram_config.cas_latency = FEMC_SDRAM_CAS_LATENCY_3;
 
     sdram_config.precharge_to_act_in_ns = 18;   /* Trp */
     sdram_config.act_to_rw_in_ns = 18;          /* Trcd */
@@ -568,7 +576,7 @@ void _init_ext_ram(void)
     sdram_config.refresh_to_refresh_in_ns = 66;     /* Trfc/Trc */
     sdram_config.act_to_act_in_ns = 12;             /* Trrd */
     sdram_config.idle_timeout_in_ns = 6;
-    sdram_config.cs_mux_pin = DRAM_IO_MUX_NOT_USED;
+    sdram_config.cs_mux_pin = FEMC_IO_MUX_NOT_USED;
 
     sdram_config.cs = BOARD_SDRAM_CS;
     sdram_config.base_address = BOARD_SDRAM_ADDRESS;
@@ -579,7 +587,7 @@ void _init_ext_ram(void)
     sdram_config.data_width_in_byte = BOARD_SDRAM_DATA_WIDTH_IN_BYTE;
     sdram_config.delay_cell_value = 29;
 
-    dram_config_sdram(HPM_DRAM, dram_clk_in_hz, &sdram_config);
+    femc_config_sdram(HPM_FEMC, femc_clk_in_hz, &sdram_config);
 }
 #endif
 
@@ -717,4 +725,26 @@ uint32_t board_init_uart_clock(UART_Type *ptr)
 uint8_t board_enet_get_dma_pbl(ENET_Type *ptr)
 {
     return enet_pbl_16;
+}
+
+hpm_stat_t board_enet_enable_irq(ENET_Type *ptr)
+{
+    if (ptr == HPM_ENET0) {
+        intc_m_enable_irq(IRQn_ENET0);
+    } else {
+        return status_invalid_argument;
+    }
+
+    return status_success;
+}
+
+hpm_stat_t board_enet_disable_irq(ENET_Type *ptr)
+{
+    if (ptr == HPM_ENET0) {
+        intc_m_disable_irq(IRQn_ENET0);
+    }  else {
+        return status_invalid_argument;
+    }
+
+    return status_success;
 }

boards/hpm6300evk/board.h

@@ -39,6 +39,8 @@
 
 #define BOARD_APP_UART_BAUDRATE (115200UL)
 #define BOARD_APP_UART_CLK_NAME clock_uart0
+#define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
+#define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
 
 #ifndef BOARD_CONSOLE_TYPE
 #define BOARD_CONSOLE_TYPE console_type_uart
@@ -80,8 +82,8 @@
 /* sdram section */
 #define BOARD_SDRAM_ADDRESS  (0x40000000UL)
 #define BOARD_SDRAM_SIZE     (32*SIZE_1MB)
-#define BOARD_SDRAM_CS       DRAM_SDRAM_CS0
-#define BOARD_SDRAM_PORT_SIZE DRAM_SDRAM_PORT_SIZE_16_BITS
+#define BOARD_SDRAM_CS       FEMC_SDRAM_CS0
+#define BOARD_SDRAM_PORT_SIZE FEMC_SDRAM_PORT_SIZE_16_BITS
 #define BOARD_SDRAM_REFRESH_COUNT (8192UL)
 #define BOARD_SDRAM_REFRESH_IN_MS (64UL)
 #define BOARD_SDRAM_DATA_WIDTH_IN_BYTE (4UL)
@@ -97,7 +99,6 @@
 #define BOARD_APP_I2C_DMA HPM_HDMA
 #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX
 #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C0
-#define BOARD_APP_I2C_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0
 
 /* ACMP desction */
 #define BOARD_ACMP HPM_ACMP
@@ -143,13 +144,11 @@
 #define BOARD_APP_SPI_BASE HPM_SPI3
 #define BOARD_APP_SPI_CLK_NAME          clock_spi3
 #define BOARD_APP_SPI_IRQ               IRQn_SPI3
-#define BOARD_APP_SPI_SCLK_FREQ         (1562500UL)
+#define BOARD_APP_SPI_SCLK_FREQ         (20000000UL)
 #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
 #define BOARD_APP_SPI_DATA_LEN_IN_BITS  (8U)
 #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX
-#define BOARD_APP_SPI_RX_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0
 #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX
-#define BOARD_APP_SPI_TX_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX1
 #define BOARD_SPI_CS_GPIO_CTRL           HPM_GPIO0
 #define BOARD_SPI_CS_PIN                 IOC_PAD_PC18
 #define BOARD_SPI_CS_ACTIVE_LEVEL        (0U)
@@ -281,7 +280,7 @@
 #define BOARD_BLDC_ADC_W_BASE                  HPM_ADC2
 #define BOARD_BLDC_ADC_TRIG_FLAG               adc16_event_trig_complete
 
-#define BOARD_BLDC_ADC_CH_U                    (14U)
+#define BOARD_BLDC_ADC_CH_U                    (7U)
 #define BOARD_BLDC_ADC_CH_V                    (12U)
 #define BOARD_BLDC_ADC_CH_W                    (5U)
 #define BOARD_BLDC_ADC_IRQn                    IRQn_ADC1
@@ -330,7 +329,7 @@ void board_init_i2c(I2C_Type *ptr);
 
 void board_init_can(CAN_Type *ptr);
 
-uint32_t board_init_dram_clock(void);
+uint32_t board_init_femc_clock(void);
 
 void board_init_sdram_pins(void);
 void board_init_gpio_pins(void);
@@ -371,11 +370,13 @@ void board_init_usb_pins(void);
 void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level);
 uint8_t board_get_usb_id_status(void);
 
+uint8_t    board_enet_get_dma_pbl(ENET_Type *ptr);
 hpm_stat_t board_reset_enet_phy(ENET_Type *ptr);
 hpm_stat_t board_init_enet_pins(ENET_Type *ptr);
 hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal);
 hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr);
-uint8_t board_enet_get_dma_pbl(ENET_Type *ptr);
+hpm_stat_t board_enet_enable_irq(ENET_Type *ptr);
+hpm_stat_t board_enet_disable_irq(ENET_Type *ptr);
 /*
  * @brief Initialize PMP and PMA for but not limited to the following purposes:
  *      -- non-cacheable memory initialization
@@ -391,6 +392,11 @@ void board_ungate_mchtmr_at_lp_mode(void);
 /* Initialize the UART clock */
 uint32_t board_init_uart_clock(UART_Type *ptr);
 
+/*
+ * Get GPIO pin level of onboard LED
+ */
+uint8_t board_get_led_gpio_off_level(void);
+
 #if defined(__cplusplus)
 }
 #endif /* __cplusplus */