Merge pull request #98 from edwarddavidbaker/sync-platforms

EMR, SPR, CLX, SKX, BDX, HSX, BDW-DE, WSM-EP*, NHM-*, JKT, IVT : Release event updates
intel · Aug 28, 2023 · 3c273e2 · 3c273e2
2 parents a5c1a73 + 9f23a78
commit 3c273e2
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diff --git a/BDW-DE/events/broadwellde_core.json b/BDW-DE/events/broadwellde_core.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Core(TM) Processor Based on the Broadwell-DE Microarchitecture - V10",
-    "DatePublished": "04/14/2023",
-    "Version": "10",
+    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Core(TM) Processor Based on the Broadwell-DE Microarchitecture - V11",
+    "DatePublished": "08/24/2023",
+    "Version": "11",
     "Legend": ""
   },
   "Events": [

diff --git a/BDW-DE/events/broadwellde_matrix_bit_definitions.json b/BDW-DE/events/broadwellde_matrix_bit_definitions.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Core(TM) Processor Based on the Broadwell-DE Microarchitecture - V10",
-    "DatePublished": "04/14/2023",
-    "Version": "10",
+    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Core(TM) Processor Based on the Broadwell-DE Microarchitecture - V11",
+    "DatePublished": "08/24/2023",
+    "Version": "11",
     "Legend": ""
   },
   "Events": [

diff --git a/BDW-DE/events/broadwellde_uncore.json b/BDW-DE/events/broadwellde_uncore.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Core(TM) Processor Based on the Broadwell-DE Microarchitecture - V10",
-    "DatePublished": "04/14/2023",
-    "Version": "10",
+    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Core(TM) Processor Based on the Broadwell-DE Microarchitecture - V11",
+    "DatePublished": "08/24/2023",
+    "Version": "11",
     "Legend": ""
   },
   "Events": [
@@ -5421,7 +5421,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL",
       "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL",
-      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5434,7 +5434,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_DRS_INSERTS",
       "BriefDescription": "BL Ingress Occupancy - DRS",
-      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5447,7 +5447,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY",
       "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY",
-      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5460,7 +5460,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL",
       "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL",
-      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5473,7 +5473,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCB_INSERTS",
       "BriefDescription": "BL Ingress Occupancy - NCB",
-      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5486,7 +5486,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY",
       "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY",
-      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5499,7 +5499,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL",
       "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL",
-      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5512,7 +5512,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCS_INSERTS",
       "BriefDescription": "BL Ingress Occupancy - NCS",
-      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -5525,7 +5525,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY",
       "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY",
-      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",

diff --git a/BDX/events/broadwellx_core.json b/BDX/events/broadwellx_core.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for Intel(R) Xeon(R) Processor E5 v4 Family Based on the Broadwell Microarchitecture - V21",
-    "DatePublished": "04/14/2023",
-    "Version": "21",
+    "Info": "Performance Monitoring Events for Intel(R) Xeon(R) Processor E5 v4 Family Based on the Broadwell Microarchitecture - V22",
+    "DatePublished": "08/24/2023",
+    "Version": "22",
     "Legend": ""
   },
   "Events": [

diff --git a/BDX/events/broadwellx_matrix_bit_definitions.json b/BDX/events/broadwellx_matrix_bit_definitions.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for Intel(R) Xeon(R) Processor E5 v4 Family Based on the Broadwell Microarchitecture - V21",
-    "DatePublished": "04/14/2023",
-    "Version": "21",
+    "Info": "Performance Monitoring Events for Intel(R) Xeon(R) Processor E5 v4 Family Based on the Broadwell Microarchitecture - V22",
+    "DatePublished": "08/24/2023",
+    "Version": "22",
     "Legend": ""
   },
   "Events": [

diff --git a/BDX/events/broadwellx_uncore.json b/BDX/events/broadwellx_uncore.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for Intel(R) Xeon(R) Processor E5 v4 Family Based on the Broadwell Microarchitecture - V21",
-    "DatePublished": "04/14/2023",
-    "Version": "21",
+    "Info": "Performance Monitoring Events for Intel(R) Xeon(R) Processor E5 v4 Family Based on the Broadwell Microarchitecture - V22",
+    "DatePublished": "08/24/2023",
+    "Version": "22",
     "Legend": ""
   },
   "Events": [
@@ -4654,7 +4654,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL",
       "BriefDescription": "UNC_I_RxR_BL_DRS_CYCLES_FULL",
-      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4667,7 +4667,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_DRS_INSERTS",
       "BriefDescription": "BL Ingress Occupancy - DRS",
-      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4680,7 +4680,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY",
       "BriefDescription": "UNC_I_RxR_BL_DRS_OCCUPANCY",
-      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4693,7 +4693,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL",
       "BriefDescription": "UNC_I_RxR_BL_NCB_CYCLES_FULL",
-      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4706,7 +4706,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCB_INSERTS",
       "BriefDescription": "BL Ingress Occupancy - NCB",
-      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4719,7 +4719,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY",
       "BriefDescription": "UNC_I_RxR_BL_NCB_OCCUPANCY",
-      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4732,7 +4732,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL",
       "BriefDescription": "UNC_I_RxR_BL_NCS_CYCLES_FULL",
-      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4745,7 +4745,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCS_INSERTS",
       "BriefDescription": "BL Ingress Occupancy - NCS",
-      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",
@@ -4758,7 +4758,7 @@
       "UMask": "0x0",
       "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY",
       "BriefDescription": "UNC_I_RxR_BL_NCS_OCCUPANCY",
-      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
+      "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requests as well as outbound MMIO writes.",
       "Counter": "0,1",
       "MSRValue": "0x00",
       "ELLC": "0",

diff --git a/CLX/events/cascadelakex_core.json b/CLX/events/cascadelakex_core.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.19",
-    "DatePublished": "06/07/2023",
-    "Version": "1.19",
+    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.20",
+    "DatePublished": "08/01/2023",
+    "Version": "1.20",
     "Legend": ""
   },
   "Events": [

diff --git a/CLX/events/cascadelakex_fp_arith_inst.json b/CLX/events/cascadelakex_fp_arith_inst.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.19",
-    "DatePublished": "06/07/2023",
-    "Version": "1.19",
+    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.20",
+    "DatePublished": "08/01/2023",
+    "Version": "1.20",
     "Legend": ""
   },
   "Events": [

diff --git a/CLX/events/cascadelakex_uncore.json b/CLX/events/cascadelakex_uncore.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.19",
-    "DatePublished": "06/07/2023",
-    "Version": "1.19",
+    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.20",
+    "DatePublished": "08/01/2023",
+    "Version": "1.20",
     "Legend": ""
   },
   "Events": [
@@ -2653,6 +2653,24 @@
       "Deprecated": "0",
       "FILTER_VALUE": "0"
     },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x50",
+      "UMask": "0x08",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x00",
+      "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE",
+      "BriefDescription": "Read and Write Requests; Writes Remote",
+      "PublicDescription": "Counts the total number of read requests made into the Home Agent. Reads include all read opcodes (including RFO).  Writes include all writes (streaming, evictions, HitM, etc).",
+      "Counter": "0,1,2,3",
+      "MSRValue": "0x00",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0"
+    },
     {
       "Unit": "CHA",
       "EventCode": "0x50",

diff --git a/CLX/events/cascadelakex_uncore_experimental.json b/CLX/events/cascadelakex_uncore_experimental.json
@@ -1,9 +1,9 @@
 {
   "Header": {
     "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.19",
-    "DatePublished": "06/07/2023",
-    "Version": "1.19",
+    "Info": "Performance Monitoring Events for 2nd Generation Intel(R) Xeon(R) Processor Scalable Family based on Cascade Lake product - V1.20",
+    "DatePublished": "08/01/2023",
+    "Version": "1.20",
     "Legend": ""
   },
   "Events": [
@@ -33991,24 +33991,6 @@
       "Deprecated": "0",
       "FILTER_VALUE": "0"
     },
-    {
-      "Unit": "CHA",
-      "EventCode": "0x50",
-      "UMask": "0x08",
-      "PortMask": "0x00",
-      "FCMask": "0x00",
-      "UMaskExt": "0x00",
-      "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE",
-      "BriefDescription": "Read and Write Requests; Writes Remote",
-      "PublicDescription": "Counts the total number of read requests made into the Home Agent. Reads include all read opcodes (including RFO).  Writes include all writes (streaming, evictions, HitM, etc).",
-      "Counter": "0,1,2,3",
-      "MSRValue": "0x00",
-      "ELLC": "0",
-      "Filter": "na",
-      "ExtSel": "0",
-      "Deprecated": "0",
-      "FILTER_VALUE": "0"
-    },
     {
       "Unit": "CHA",
       "EventCode": "0x5C",