adding missing files.

examples/testfiles/diode.asy

@@ -0,0 +1,19 @@
+Version 4
+SymbolType CELL
+LINE Normal 0 44 32 44
+LINE Normal 0 20 32 20
+LINE Normal 32 20 16 44
+LINE Normal 0 20 16 44
+LINE Normal 16 0 16 20
+LINE Normal 16 44 16 64
+WINDOW 0 24 0 Left 2
+WINDOW 3 24 64 Left 2
+SYMATTR Value D
+SYMATTR Prefix D
+SYMATTR Description Diode
+PIN 16 0 NONE 0
+PINATTR PinName +
+PINATTR SpiceOrder 1
+PIN 16 64 NONE 0
+PINATTR PinName -
+PINATTR SpiceOrder 2

examples/testfiles/res.asy

@@ -0,0 +1,20 @@
+Version 4
+SymbolType CELL
+LINE Normal 16 88 16 96
+LINE Normal 0 80 16 88
+LINE Normal 32 64 0 80
+LINE Normal 0 48 32 64
+LINE Normal 32 32 0 48
+LINE Normal 16 16 16 24
+LINE Normal 16 24 32 32
+WINDOW 0 36 40 Left 2
+WINDOW 3 36 76 Left 2
+SYMATTR Value R
+SYMATTR Prefix R
+SYMATTR Description A resistor
+PIN 16 16 NONE 0
+PINATTR PinName A
+PINATTR SpiceOrder 1
+PIN 16 96 NONE 0
+PINATTR PinName B
+PINATTR SpiceOrder 2

examples/testfiles/sub_circuit.asy

@@ -0,0 +1,15 @@
+Version 4
+SymbolType BLOCK
+LINE Normal 49 -64 1 -32
+LINE Normal 80 -64 49 -64
+LINE Normal 128 -32 80 -64
+LINE Normal 128 -32 128 -32
+RECTANGLE Normal 128 32 0 -32
+CIRCLE Normal 86 -53 45 -65
+ARC Normal 36 -18 92 -54 60 -7 58 -60
+PIN 0 0 LEFT 8
+PINATTR PinName IN
+PINATTR SpiceOrder 1
+PIN 128 0 RIGHT 8
+PINATTR PinName OUT
+PINATTR SpiceOrder 2

examples/testfiles/voltage.asy

@@ -0,0 +1,19 @@
+Version 4
+SymbolType CELL
+LINE Normal -8 36 8 36
+LINE Normal -8 76 8 76
+LINE Normal 0 28 0 44
+LINE Normal 0 96 0 88
+LINE Normal 0 16 0 24
+CIRCLE Normal -32 24 32 88
+WINDOW 0 24 16 Left 2
+WINDOW 3 24 96 Left 2
+SYMATTR Value V
+SYMATTR Prefix V
+SYMATTR Description Voltage Source, either DC, AC, PULSE, SINE, PWL, EXP, or SFFM
+PIN 0 16 NONE 0
+PINATTR PinName +
+PINATTR SpiceOrder 1
+PIN 0 96 NONE 0
+PINATTR PinName -
+PINATTR SpiceOrder 2