Merge pull request #55 from techiepriyansh/csr-comb-gen

Add support for CSR combination coverpoints' test generation

CHANGELOG.md

@@ -2,6 +2,9 @@
 
 This project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+## [0.11.0] - 2022-12-11
+- Added support for csr_comb test generation
+
 ## [0.10.4] - 2023-03-28
 - Adding Zicond support
 

docs/source/csr_comb.rst

@@ -0,0 +1,26 @@
+*************************************************
+Test Generation using CSR Combination Coverpoints
+*************************************************
+
+CSR Combination Coverpoints can help checking for some basic compliance with the privileged
+part of the RISC-V spec by specifying conditions on the CSR values.
+The coverpoint node associated with the test generation is ``csr_comb`` defined `here <https://riscv-isac.readthedocs.io/en/stable/cgf.html>`_.
+
+Currently, the test generation is only possible for the coverpoints that test for the values of subfields in CSRs.
+Thus, the only supported coverpoints are the form ``csr_reg & mask == val``, where:
+
+* ``mask`` and ``val`` are allowed to be any valid python expressions.
+* ``csr_reg`` is allowed to be operated by a bit shift operator, i.e., ``(csr_reg >> shift) & mask == val`` is allowed where ``shift`` is a valid python expression.
+* functions ``old("csr_name")`` and ``write("csr_name")`` are allowed to be used in the place of ``csr_reg`` to access the old value and write value of a CSR respectively.
+* combination of multiple conditions with ``and`` and ``or`` is allowed.
+
+Example
+-------
+
+    **Coverpoint Definition**
+
+    An example CSR combination coverpoint is given below: ::
+
+        misa:
+            csr_comb:
+                'old("misa") & 0x4 == 0 and (write("misa") >> 12) & 1 == 0 and misa & 0x1000 == 0x1000': 0

riscv_ctg/__init__.py

@@ -4,5 +4,4 @@
 
 __author__ = """InCore Semiconductors Pvt Ltd"""
 __email__ = 'incorebot@gmail.com'
-__version__ = '0.10.4'
-
+__version__ = '0.11.0'

riscv_ctg/constants.py

@@ -221,6 +221,10 @@ def gen_bitmanip_dataset(bit_width,sign=True):
 // This assembly file is used for the test of cross-combination coverpoint described in $label covergroup.
 '''
 
+csr_comb_comment_template = '''
+// This assembly file is used for the test of CSR-combination coverpoint described in $label covergroup.
+'''
+
 test_template = Template(copyright_string + comment_template+'''
 #include "model_test.h"
 #include "arch_test.h"
@@ -277,6 +281,30 @@ def gen_bitmanip_dataset(bit_width,sign=True):
 RVMODEL_DATA_END
 ''')
 
+csr_comb_test_template = Template(copyright_string + csr_comb_comment_template + '''
+#include "model_test.h"
+#include "arch_test.h"
+RVTEST_ISA("$isa")
+
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+$test
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+$data
+RVTEST_DATA_END
+
+RVMODEL_DATA_BEGIN
+$sig
+RVMODEL_DATA_END
+''')
+
 case_template = Template('''
 RVTEST_CASE($num,"//$cond;def TEST_CASE_1=True;",$cov_label)
 ''')
@@ -293,3 +321,14 @@ def gen_bitmanip_dataset(bit_width,sign=True):
     .fill $n*$sz,4,0xdeadbeef
 ''')
 
+csr_reg_write_to_field_template = Template('''
+WRITE_TO_CSR_FIELD_W_MASK($csr_reg, $restore_reg, $temp_reg1, $temp_reg2, $mask, $val)
+''')
+
+csr_reg_read_and_sig_upd_template = Template('''
+READ_CSR_REG_AND_UPD_SIG($csr_reg, $dest_reg, $offset, $base_reg)
+''')
+
+csr_reg_restore_template = Template('''
+RESTORE_CSR_REG($csr_reg, $restore_reg)
+''')