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Adding support for FREE WILi #244
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Can you fix the indentation? It's all over the place, hard to read this code.
More information on coding style here:
https://github.com/sigrokproject/libsigrok/blob/master/HACKING
reformatted per Linux coding style
Ok, thanks for the reformatting. Please squash those commits though. A few questions:
I'll do a thorough review once you've squashed your commits, but for now a couple of things I noticed:
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Thank you @biot for your comments. Here is the feedback I can provide; from the technical perspective I will email @Ytuf to make sure he sees this.
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I would strongly recommend going for other, lower samplerates. On the FX2 the 24MHz rate is super unreliable, and worse: it's different for everyone, and for some it never works at all. Shitty USB hub in between, other traffic on the bus, anything will kill it. I have a USB cable that consistently breaks the 24MHz stream, I assume some shielding issue. Save yourself the support headache. New drivers always get squashed, since the initial devel commits aren't that relevant for sigrok. Typically we like a stub generated by the |
Thanks for all the feedback @biot, and thank you for your help @wskellenger-intrepid!
The FPGA communicates with the PC through an FTDI chip (the (FT232HQ-REEL)), it should be plug-and-play with no special preparation needed similar to the "FTDI-LA" logic analyzer.
This is an initial hardware limitation as 31.25 MHz is simply the frequency the FPGA runs at. I am currently developing a more advanced version that should allow choosing between some samplerates. 8 MHz is my goal for the maximum samplerate.
The current released version has a 32 KB buffer built-in plus a 1 KB buffer on the FTDI chip. The version I'm working on now will have a 64 KB buffer. I am also dedicating 4 bits to RLE which gives these buffers a bit more wiggle room.
The current version never "dies", but it does occasionally overflow the buffer and therefore loses data. Honestly, it works a lot better than you'd expect. Once the hardware is adjusted to an 8 MHz sample rate this issue will no longer be present. I'll take a look at the scan_devices() function and clean up the debug print statements. Thanks again! |
Added support for the FREE WILi hardware development tool (https://freewili.com/) which uses FT1248 4-wire protocol on a FT232H chip. Tested with a FREE WILi, no problems I'm aware of.