Add support for extra video modes

This solves issue #9

CORE/CORE-R3.xpr

@@ -226,6 +226,12 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
+      <File Path="$PPRDIR/../M2M/vhdl/clock_counter.vhd">
+        <FileInfo SFType="VHDL2008">
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="simulation"/>
+        </FileInfo>
+      </File>
       <File Path="$PPRDIR/vhdl/clk.vhd">
         <FileInfo SFType="VHDL2008">
           <Attr Name="UsedIn" Val="synthesis"/>

CORE/CORE-R4.xpr

@@ -239,12 +239,6 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
-      <File Path="$PPRDIR/../M2M/vhdl/controllers/HDMI/video_out_clock.vhd">
-        <FileInfo SFType="VHDL2008">
-          <Attr Name="UsedIn" Val="synthesis"/>
-          <Attr Name="UsedIn" Val="simulation"/>
-        </FileInfo>
-      </File>
       <File Path="$PPRDIR/../M2M/vhdl/controllers/HDMI/types_pkg.vhd">
         <FileInfo SFType="VHDL2008">
           <Attr Name="UsedIn" Val="synthesis"/>
@@ -389,6 +383,12 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
+      <File Path="$PPRDIR/../M2M/vhdl/clock_counter.vhd">
+        <FileInfo SFType="VHDL2008">
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="simulation"/>
+        </FileInfo>
+      </File>
       <File Path="$PPRDIR/vhdl/config.vhd">
         <FileInfo SFType="VHDL2008">
           <Attr Name="UsedIn" Val="synthesis"/>
@@ -449,6 +449,12 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
+      <File Path="$PPRDIR/../M2M/vhdl/controllers/HDMI/video_out_clock.vhd">
+        <FileInfo SFType="VHDL2008">
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="simulation"/>
+        </FileInfo>
+      </File>
       <File Path="$PPRDIR/../M2M/vhdl/reset_manager.vhd">
         <FileInfo SFType="VHDL2008">
           <Attr Name="UsedIn" Val="synthesis"/>

CORE/CORE-R5.xpr

@@ -389,6 +389,12 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
+      <File Path="$PPRDIR/../M2M/vhdl/clock_counter.vhd">
+        <FileInfo SFType="VHDL2008">
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="simulation"/>
+        </FileInfo>
+      </File>
       <File Path="$PPRDIR/vhdl/config.vhd">
         <FileInfo SFType="VHDL2008">
           <Attr Name="UsedIn" Val="synthesis"/>

CORE/vhdl/config.vhd

@@ -329,7 +329,7 @@ constant OPTM_S_SAVING     : string := "<Saving>";          -- the internal writ
 --             Do use a lower case \n. If you forget one of them or if you use upper case, you will run into undefined behavior.
 --          2. Start each line that contains an actual menu item (multi- or single-select) with a Space character,
 --             otherwise you will experience visual glitches.
-constant OPTM_SIZE         : natural := 32;  -- amount of items including empty lines:
+constant OPTM_SIZE         : natural := 37;  -- amount of items including empty lines:
                                              -- needs to be equal to the number of lines in OPTM_ITEMS and amount of items in OPTM_GROUPS
                                              -- IMPORTANT: If SAVE_SETTINGS is true and OPTM_SIZE changes: Make sure to re-generate and
                                              -- and re-distribute the config file. You can make a new one using M2M/tools/make_config.sh
@@ -418,6 +418,11 @@ constant OPTM_GROUPS       : OPTM_GTYPE := ( OPTM_G_TEXT + OPTM_G_HEADLINE,
                                              OPTM_G_HDMI,                              -- 720p 60 Hz 16:9
                                              OPTM_G_HDMI,                              -- 576p 50 Hz 4:3
                                              OPTM_G_HDMI,                              -- 576p 50 Hz 5:4
+                                             OPTM_G_HDMI,                              -- 640x480 60 Hz
+                                             OPTM_G_HDMI,                              -- 720x480 60 Hz
+                                             OPTM_G_HDMI,                              -- 640x480 59.94 Hz
+                                             OPTM_G_HDMI,                              -- 720x480 59.94 Hz
+                                             OPTM_G_HDMI,                              -- 720p 59.94 Hz
                                              OPTM_G_LINE,                              -- open
                                              OPTM_G_CLOSE + OPTM_G_SUBMENU,            -- Close submenu / back to main menu
                                                                                        -- HDMI submenu block: END

M2M/vhdl/clock_counter.vhd

@@ -0,0 +1,67 @@
+----------------------------------------------------------------------------------
+-- CLOCK COUNTER
+-- It monitors an unknown clock and returns its frequency in Hz
+--
+-- MiSTer2MEGA65 done by sy2002 and MJoergen in 2023 and licensed under GPL v3
+----------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+use work.qnice_tools.all;
+
+library xpm;
+use xpm.vcomponents.all;
+
+entity clock_counter is
+port (
+   clk_i     : in    std_logic; -- Main clock
+   pps_i     : in    std_logic; -- One pulse per second
+   cnt_o     : out   std_logic_vector(27 downto 0); -- Frequency of mon_clk_i
+   mon_clk_i : in    std_logic  -- Clock to monitor
+);
+end entity clock_counter;
+
+architecture synthesis of clock_counter is
+
+signal mon_pps               : std_logic;
+signal mon_clk_cnt           : std_logic_vector(27 downto 0);
+signal mon_clk_cnt_latch     : std_logic_vector(27 downto 0);
+
+begin
+
+   i_clk2mon : entity work.cdc_pulse
+     port map (
+       src_clk_i   => clk_i,
+       src_pulse_i => pps_i,
+       dst_clk_i   => mon_clk_i,
+       dst_pulse_o => mon_pps
+     );
+
+   p_mon_clk_cnt : process (mon_clk_i)
+   begin
+      if rising_edge(mon_clk_i) then
+         -- Count number of mon clock cycles
+         mon_clk_cnt <= std_logic_vector(unsigned(mon_clk_cnt) + 1);
+
+         -- Reset counter once every second
+         if mon_pps = '1' then
+            mon_clk_cnt_latch <= mon_clk_cnt;
+            mon_clk_cnt <= (others => '0');
+         end if;
+
+      end if;
+   end process p_mon_clk_cnt;
+
+   i_mon2clk : entity work.cdc_stable
+   generic map (
+      G_DATA_SIZE    => 28
+   )
+   port map (
+      src_data_i => mon_clk_cnt_latch,
+      dst_clk_i  => clk_i,
+      dst_data_o => cnt_o
+   );
+
+end architecture synthesis;
+

M2M/vhdl/framework.vhd

@@ -399,6 +399,9 @@ signal hr_dq_in               : std_logic_vector(7 downto 0);
 signal hr_dq_out              : std_logic_vector(7 downto 0);
 signal hr_dq_oe               : std_logic;   -- Output enable for DQ
 
+signal qnice_pps              : std_logic;
+signal qnice_hdmi_clk_freq    : std_logic_vector(27 downto 0);
+
 begin
 
    hr_clk_o    <= hr_clk_x1;
@@ -446,6 +449,24 @@ begin
       ); -- i_video_out_clock
 
 
+   -- Determine HDMI clock frequency
+   i_sys2hdmi : entity work.cdc_pulse
+     port map (
+       src_clk_i   => clk_i,
+       src_pulse_i => sys_pps,
+       dst_clk_i   => qnice_clk,
+       dst_pulse_o => qnice_pps
+     );
+
+   i_clock_counter : entity work.clock_counter
+   port map (
+      clk_i     => qnice_clk,
+      pps_i     => qnice_pps,
+      cnt_o     => qnice_hdmi_clk_freq,
+      mon_clk_i => hdmi_clk
+   );
+
+
    ---------------------------------------------------------------------------------------------------------------
    -- Board Clock Domain: clk_i
    ---------------------------------------------------------------------------------------------------------------
@@ -731,6 +752,8 @@ begin
                         -- SHELL_M_DXDY: Use full screen
                         when X"002" => qnice_ramrom_data_in <= std_logic_vector(to_unsigned((VGA_DX/FONT_DX) * 256 + (VGA_DY/FONT_DY), 16));
 
+                        when X"003" => qnice_ramrom_data_in <= qnice_hdmi_clk_freq(15 downto 0);
+                        when X"004" => qnice_ramrom_data_in <= "0000" & qnice_hdmi_clk_freq(27 downto 16);
                         when others => null;
                      end case;