use make variables #7
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Replace `gcc` with variables to allow cross compiling.
| @@ -1,5 +1,5 @@ | |||
| udp-broadcast-relay-redux: main.c | |||
| gcc -g main.c -o udp-broadcast-relay-redux | |||
| $(CC) $(CFLAGS) -g main.c -o udp-broadcast-relay-redux | |||
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For this change to not break if these vars are not defined, the Makefile needs the original defaults. Something along the lines of:
ifndef CC
override CC = gcc
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Thanks for the review.
My understanding, and testing confirmed, that if CC was not defined, make used the default value cc, which on Linux for me at least links to gcc.
My testing without environment variables set gives basically the original command, but setting the environment variables to what I need allows me to cross compile.
Does this not work for you or others if the vars are not defined?
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It might not always be set. Then the Makefile will fail in interesting ways. Always nice to have a default. This is defensive programming in action.
Replace
gccwith variables to allow cross compiling.