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[ROCm] Add pieces from the CUDA codgen lowering path #14769
[ROCm] Add pieces from the CUDA codgen lowering path #14769
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Enable iree-llvmgpu-cast-address-space-function. Add DropSharedMemoryDeallocOp rewrite pattern in ConvertToROCDLPass. Remove dynamic legalization for FuncOp. Add ConvertToDynamicSharedMemory ConvertToROCDLPass.
// A `dealloc` is converted into a call to `free` on the underlying data buffer. | ||
// The memref descriptor being an SSA value, there is no need to clean it up | ||
// in any way. | ||
struct DropSharedMemoryDeallocOp : public OpRewritePattern<memref::DeallocOp> { |
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THe norm is to not have the pattern exposed directly this way. Could you move these patterns to Common/GPU
and use a populateDropSharedMemoryDeallocPatterns
method to add these patterns to both paths?
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I moved it.
@MaheshRavishankar, will you rereview this PR? |
@sogartar is this ready to merge? |
It is. |
Enable iree-llvmgpu-cast-address-space-function. Add DropSharedMemoryDeallocOp rewrite pattern in ConvertToROCDLPass. Remove dynamic legalization for FuncOp. Add ConvertToDynamicSharedMemory ConvertToROCDLPass. I am not at all confident that these need to be the same on the ROCm path as are on the CUDA path. If there is no one to express confidence I will dig deeper to make sure it makes sense. --------- Co-authored-by: Boian Petkantchin <boian@nod-labs.com>
Enable iree-llvmgpu-cast-address-space-function.
Add DropSharedMemoryDeallocOp rewrite pattern in ConvertToROCDLPass. Remove dynamic legalization for FuncOp.
Add ConvertToDynamicSharedMemory ConvertToROCDLPass.
I am not at all confident that these need to be the same on the ROCm path as are on the CUDA path. If there is no one to express confidence I will dig deeper to make sure it makes sense.