AR: Clarify message register uses. #867
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This seems contradictory. The first change says that data0-data11 are MRs. The second change says that in order for the DM to increment arg1, the data registers can't be MRs.
Maybe the idea is that data0-data11 may be implemented as MRs or they may be implemented as normal registers. Then the second thing could say that they must be implemented as normal registers and not MRs if you want incrementing to work.
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Yes, I think that would resolve the issue. |
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You could also say that there are two ways to implement message registers:
- writes to PortA update ValueA and leave ValueB UNSPECIFIED (the MR way that you've described)
- writes to PortA update both ValueA and ValueB
The latter is really just a normal register. The above description provides an alternative to having dataX be MRs in some implementations and not MRs in others. Instead, they'd always be MRs but some implementations would have deterministic behavior for the other value.
Having said that, it's probably simpler for the reader to just see "normal register" than having to mentally map this abstract two port description back to this fundamental concept (a straightforward register) that they're already familiar with. I just mention it since I thought of it and wondered if you agree that your way is simpler.
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I'm inclined to leave it as is and not confuse the reader by talking about how the MR description relates to a normal register. |
data* registers may be MRs, instead of are definitely MRs. This lets us say that if aampostincrement is implemented then they must not be MRs. Also rewrote the definition to be more clear.
I think it makes the spec better, so let's merge it. I'm planning to merge fixes to address all the preliminary feedback, and then the ball is all the way back in their court. |
aampostincrement implies the implementation does not use simple MRs.